Lines Matching defs:bool
239 bool noprobe:1; /* Bit 0 */
240 bool noprobe_pci:1; /* Bit 2 */
241 bool nosort_pci:1; /* Bit 3 */
242 bool multimaster_first:1; /* Bit 4 */
243 bool flashpoint_first:1; /* Bit 5 */
251 bool trace_probe:1; /* Bit 0 */
252 bool trace_hw_reset:1; /* Bit 1 */
253 bool trace_config:1; /* Bit 2 */
254 bool trace_err:1; /* Bit 3 */
276 bool bus_reset:1; /* Bit 4 */
277 bool int_reset:1; /* Bit 5 */
278 bool soft_reset:1; /* Bit 6 */
279 bool hard_reset:1; /* Bit 7 */
290 bool cmd_invalid:1; /* Bit 0 */
291 bool rsvd:1; /* Bit 1 */
292 bool datain_ready:1; /* Bit 2 */
293 bool cmd_param_busy:1; /* Bit 3 */
294 bool adapter_ready:1; /* Bit 4 */
295 bool init_reqd:1; /* Bit 5 */
296 bool diag_failed:1; /* Bit 6 */
297 bool diag_active:1; /* Bit 7 */
308 bool mailin_loaded:1; /* Bit 0 */
309 bool mailout_avail:1; /* Bit 1 */
310 bool cmd_complete:1; /* Bit 2 */
311 bool ext_busreset:1; /* Bit 3 */
313 bool int_valid:1; /* Bit 7 */
327 bool ext_trans_enable:1; /* Bit 7 */
399 bool dma_ch5:1; /* Byte 0 Bit 5 */
400 bool dma_ch6:1; /* Byte 0 Bit 6 */
401 bool dma_ch7:1; /* Byte 0 Bit 7 */
402 bool irq_ch9:1; /* Byte 1 Bit 0 */
403 bool irq_ch10:1; /* Byte 1 Bit 1 */
404 bool irq_ch11:1; /* Byte 1 Bit 2 */
405 bool irq_ch12:1; /* Byte 1 Bit 3 */
407 bool irq_ch14:1; /* Byte 1 Bit 5 */
408 bool irq_ch15:1; /* Byte 1 Bit 6 */
421 bool sync:1; /* Bit 7 */
425 bool sync:1; /* Byte 0 Bit 0 */
426 bool parity:1; /* Byte 0 Bit 1 */
477 bool low_term:1; /* Byte 2 Bit 0 */
478 bool high_term:1; /* Byte 2 Bit 1 */
480 bool JP1:1; /* Byte 2 Bit 4 */
481 bool JP2:1; /* Byte 2 Bit 5 */
482 bool JP3:1; /* Byte 2 Bit 6 */
483 bool genericinfo_valid:1; /* Byte 2 Bit 7 */
499 bool fast_on_eisa:1; /* Byte 9 Bit 2 */
501 bool level_int:1; /* Byte 9 Bit 6 */
505 bool wide:1; /* Byte 13 Bit 0 */
506 bool differential:1; /* Byte 13 Bit 1 */
507 bool scam:1; /* Byte 13 Bit 2 */
508 bool ultra:1; /* Byte 13 Bit 3 */
509 bool smart_term:1; /* Byte 13 Bit 4 */
544 bool floppy:1; /* Byte 10 Bit 0 */
545 bool floppy_sec:1; /* Byte 10 Bit 1 */
546 bool level_int:1; /* Byte 10 Bit 2 */
550 bool dma_autoconf:1; /* Byte 11 Bit 7 */
552 bool irq_autoconf:1; /* Byte 12 Bit 7 */
555 bool low_term:1; /* Byte 15 Bit 0 */
556 bool parity:1; /* Byte 15 Bit 1 */
557 bool high_term:1; /* Byte 15 Bit 2 */
558 bool noisy_cable:1; /* Byte 15 Bit 3 */
559 bool fast_sync_neg:1; /* Byte 15 Bit 4 */
560 bool reset_enabled:1; /* Byte 15 Bit 5 */
561 bool:1; /* Byte 15 Bit 6 */
562 bool active_negation:1; /* Byte 15 Bit 7 */
565 bool bios_enabled:1; /* Byte 18 Bit 0 */
566 bool int19_redir_enabled:1; /* Byte 18 Bit 1 */
567 bool ext_trans_enable:1; /* Byte 18 Bit 2 */
568 bool removable_as_fixed:1; /* Byte 18 Bit 3 */
569 bool:1; /* Byte 18 Bit 4 */
570 bool morethan2_drives:1; /* Byte 18 Bit 5 */
571 bool bios_int:1; /* Byte 18 Bit 6 */
572 bool floptical:1; /* Byte 19 Bit 7 */
582 bool strict_rr_enabled:1; /* Byte 33 Bit 4 */
583 bool vesabus_33mhzplus:1; /* Byte 33 Bit 5 */
584 bool vesa_burst_write:1; /* Byte 33 Bit 6 */
585 bool vesa_burst_read:1; /* Byte 33 Bit 7 */
590 bool:1; /* Byte 42 Bit 0 */
591 bool scam_dominant:1; /* Byte 42 Bit 1 */
592 bool scam_enabled:1; /* Byte 42 Bit 2 */
593 bool scam_lev2:1; /* Byte 42 Bit 3 */
595 bool int13_exten:1; /* Byte 43 Bit 0 */
596 bool:1; /* Byte 43 Bit 1 */
597 bool cd_boot:1; /* Byte 43 Bit 2 */
804 bool tag_enable:1; /* Byte 1 Bit 5 */
816 bool legacytag_enable:1; /* Byte 17 Bit 5 */
893 bool tgt_exists:1;
894 bool tagq_ok:1;
895 bool wide_ok:1;
896 bool tagq_active:1;
897 bool wide_active:1;
898 bool cmd_good:1;
899 bool tgt_info_in:1;
942 bool present; /* Byte 4 */
952 bool parity:1; /* Byte 20 Bit 0 */
953 bool wide:1; /* Byte 20 Bit 1 */
954 bool softreset:1; /* Byte 20 Bit 2 */
955 bool ext_trans_enable:1; /* Byte 20 Bit 3 */
956 bool low_term:1; /* Byte 20 Bit 4 */
957 bool high_term:1; /* Byte 20 Bit 5 */
958 bool report_underrun:1; /* Byte 20 Bit 6 */
959 bool scam_enabled:1; /* Byte 20 Bit 7 */
960 bool scam_lev2:1; /* Byte 21 Bit 0 */
993 bool irq_acquired:1;
994 bool ext_trans_enable:1;
995 bool parity:1;
996 bool reset_enabled:1;
997 bool level_int:1;
998 bool wide:1;
999 bool differential:1;
1000 bool scam:1;
1001 bool ultra:1;
1002 bool ext_lun:1;
1003 bool terminfo_valid:1;
1004 bool low_term:1;
1005 bool high_term:1;
1006 bool strict_rr:1;
1007 bool scam_enabled:1;
1008 bool scam_lev2:1;
1009 bool adapter_initd:1;
1010 bool adapter_extreset:1;
1011 bool adapter_intern_err:1;
1012 bool processing_ccbs;
1013 volatile bool adapter_cmd_complete;
1088 bool rmb:1; /* Byte 1 Bit 7 */
1094 bool TrmIOP:1; /* Byte 3 Bit 6 */
1095 bool AENC:1; /* Byte 3 Bit 7 */
1099 bool SftRe:1; /* Byte 7 Bit 0 */
1100 bool CmdQue:1; /* Byte 7 Bit 1 */
1101 bool:1; /* Byte 7 Bit 2 */
1102 bool linked:1; /* Byte 7 Bit 3 */
1103 bool sync:1; /* Byte 7 Bit 4 */
1104 bool WBus16:1; /* Byte 7 Bit 5 */
1105 bool WBus32:1; /* Byte 7 Bit 6 */
1106 bool RelAdr:1; /* Byte 7 Bit 7 */
1280 static int blogic_resetadapter(struct blogic_adapter *, bool hard_reset);