Lines Matching refs:base
140 void __iomem *base;
149 val = readl(chip->base + SUNXI_ALRM_IRQ_STA);
153 writel(val, chip->base + SUNXI_ALRM_IRQ_STA);
169 alrm_val = readl(chip->base + SUNXI_ALRM_EN);
172 alrm_irq_val = readl(chip->base + SUNXI_ALRM_IRQ_EN);
176 chip->base + SUNXI_ALRM_IRQ_STA);
179 writel(alrm_val, chip->base + SUNXI_ALRM_EN);
180 writel(alrm_irq_val, chip->base + SUNXI_ALRM_IRQ_EN);
191 alrm = readl(chip->base + SUNXI_ALRM_DHMS);
192 date = readl(chip->base + SUNXI_RTC_YMD);
211 alrm_en = readl(chip->base + SUNXI_ALRM_IRQ_EN);
227 date = readl(chip->base + SUNXI_RTC_YMD);
228 time = readl(chip->base + SUNXI_RTC_HMS);
229 } while ((date != readl(chip->base + SUNXI_RTC_YMD)) ||
230 (time != readl(chip->base + SUNXI_RTC_HMS)));
291 writel(0, chip->base + SUNXI_ALRM_DHMS);
298 writel(alrm, chip->base + SUNXI_ALRM_DHMS);
300 writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
301 writel(SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN, chip->base + SUNXI_ALRM_IRQ_EN);
315 reg = readl(chip->base + offset);
361 writel(0, chip->base + SUNXI_RTC_HMS);
362 writel(0, chip->base + SUNXI_RTC_YMD);
364 writel(time, chip->base + SUNXI_RTC_HMS);
378 writel(date, chip->base + SUNXI_RTC_YMD);
436 chip->base = devm_platform_ioremap_resource(pdev, 0);
437 if (IS_ERR(chip->base))
438 return PTR_ERR(chip->base);
457 writel(0, chip->base + SUNXI_ALRM_DHMS);
460 writel(0, chip->base + SUNXI_ALRM_EN);
463 writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
466 writel(SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND, chip->base +