Lines Matching defs:base
147 void __iomem *base;
168 val = readl(rtc->base + SUN6I_LOSC_CTRL);
176 val = readl(rtc->base + SUN6I_LOSC_CLK_PRESCAL);
187 return readl(rtc->base + SUN6I_LOSC_CTRL) & SUN6I_LOSC_CTRL_EXT_OSC;
200 val = readl(rtc->base + SUN6I_LOSC_CTRL);
208 writel(val, rtc->base + SUN6I_LOSC_CTRL);
249 rtc->base = of_io_request_and_map(node, 0, of_node_full_name(node));
250 if (IS_ERR(rtc->base)) {
259 writel(reg, rtc->base + SUN6I_LOSC_CTRL);
268 writel(reg, rtc->base + SUN6I_LOSC_CTRL);
307 0, rtc->base + SUN6I_LOSC_OUT_GATING,
421 val = readl(chip->base + SUN6I_ALRM_IRQ_STA);
425 writel(val, chip->base + SUN6I_ALRM_IRQ_STA);
449 chip->base + SUN6I_ALRM_IRQ_STA);
453 writel(alrm_val, chip->base + SUN6I_ALRM_EN);
454 writel(alrm_irq_val, chip->base + SUN6I_ALRM_IRQ_EN);
455 writel(alrm_wake_val, chip->base + SUN6I_ALARM_CONFIG);
468 date = readl(chip->base + SUN6I_RTC_YMD);
469 time = readl(chip->base + SUN6I_RTC_HMS);
470 } while ((date != readl(chip->base + SUN6I_RTC_YMD)) ||
471 (time != readl(chip->base + SUN6I_RTC_HMS)));
476 * does not mandate any epoch base. The BSP driver uses
508 alrm_en = readl(chip->base + SUN6I_ALRM_IRQ_EN);
509 alrm_st = readl(chip->base + SUN6I_ALRM_IRQ_STA);
564 writel(0, chip->base + SUN6I_ALRM_COUNTER);
566 writel(0, chip->base + SUN6I_ALRM_COUNTER_HMS);
569 writel(counter_val, chip->base + SUN6I_ALRM_COUNTER);
571 writel(counter_val_hms, chip->base + SUN6I_ALRM_COUNTER_HMS);
586 reg = readl(chip->base + offset);
629 writel(time, chip->base + SUN6I_RTC_HMS);
643 writel(date, chip->base + SUN6I_RTC_YMD);
685 val[i] = readl(chip->base + SUN6I_GP_DATA + offset + 4 * i);
697 writel(val[i], chip->base + SUN6I_GP_DATA + offset + 4 * i);
774 chip->base = devm_platform_ioremap_resource(pdev, 0);
775 if (IS_ERR(chip->base))
776 return PTR_ERR(chip->base);
779 ret = sun6i_rtc_ccu_probe(dev, chip->base);
801 writel(0, chip->base + SUN6I_ALRM_COUNTER);
804 writel(0, chip->base + SUN6I_ALRM_EN);
807 writel(0, chip->base + SUN6I_ALRM_IRQ_EN);
810 writel(0, chip->base + SUN6I_ALRM1_EN);
813 writel(0, chip->base + SUN6I_ALRM1_IRQ_EN);
817 chip->base + SUN6I_ALRM_IRQ_STA);
821 chip->base + SUN6I_ALRM1_IRQ_STA);
824 writel(0, chip->base + SUN6I_ALARM_CONFIG);