Lines Matching refs:isr
103 u16 isr;
155 unsigned int isr = readl_relaxed(rtc->base + regs->isr);
157 if (!(isr & STM32_RTC_ISR_INITF)) {
158 isr |= STM32_RTC_ISR_INIT;
159 writel_relaxed(isr, rtc->base + regs->isr);
167 return readl_relaxed_poll_timeout_atomic(rtc->base + regs->isr, isr,
168 (isr & STM32_RTC_ISR_INITF),
178 unsigned int isr = readl_relaxed(rtc->base + regs->isr);
180 isr &= ~STM32_RTC_ISR_INIT;
181 writel_relaxed(isr, rtc->base + regs->isr);
187 unsigned int isr = readl_relaxed(rtc->base + regs->isr);
189 isr &= ~STM32_RTC_ISR_RSF;
190 writel_relaxed(isr, rtc->base + regs->isr);
196 return readl_relaxed_poll_timeout_atomic(rtc->base + regs->isr,
197 isr,
198 (isr & STM32_RTC_ISR_RSF),
476 unsigned int cr, isr, alrmar;
514 ret = readl_relaxed_poll_timeout_atomic(rtc->base + regs->isr,
515 isr,
516 (isr & STM32_RTC_ISR_ALRAWF),
548 writel_relaxed(readl_relaxed(rtc->base + regs->isr) & ~flags,
549 rtc->base + regs->isr);
560 .isr = 0x0C,
582 .isr = 0x0C,
613 .isr = 0x0C, /* named RTC_ICSR on stm32mp1 */
841 if (!(readl_relaxed(rtc->base + regs->isr) & STM32_RTC_ISR_INITS))