Lines Matching refs:base
90 void __iomem *base;
100 writel(RTC_BIT_AI, ldata->base + RTC_ICR);
102 imsc = readl(ldata->base + RTC_IMSC);
105 writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC);
107 writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);
170 pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
171 readl(ldata->base + RTC_YDR), tm);
185 writel(bcd_year, ldata->base + RTC_YLR);
186 writel(time, ldata->base + RTC_LR);
197 ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
198 readl(ldata->base + RTC_YMR), &alarm->time);
200 alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
201 alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
216 writel(bcd_year, ldata->base + RTC_YMR);
217 writel(time, ldata->base + RTC_MR);
231 rtcmis = readl(ldata->base + RTC_MIS);
233 writel(RTC_BIT_AI, ldata->base + RTC_ICR);
247 rtc_time64_to_tm(readl(ldata->base + RTC_DR), tm);
256 writel(rtc_tm_to_time64(tm), ldata->base + RTC_LR);
265 rtc_time64_to_tm(readl(ldata->base + RTC_MR), &alarm->time);
267 alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
268 alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
277 writel(rtc_tm_to_time64(&alarm->time), ldata->base + RTC_MR);
316 ldata->base = devm_ioremap(&adev->dev, adev->res.start,
318 if (!ldata->base) {
328 data = readl(ldata->base + RTC_CR);
334 writel(data, ldata->base + RTC_CR);
341 if (readl(ldata->base + RTC_YDR) == 0x2000) {
342 time = readl(ldata->base + RTC_DR);
347 writel(0x2000, ldata->base + RTC_YLR);
348 writel(time, ldata->base + RTC_LR);