Lines Matching defs:pcf2127
202 struct pcf2127 {
213 * In the routines that deal directly with the pcf2127 hardware, we use
218 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
226 ret = regmap_bulk_read(pcf2127->regmap, pcf2127->cfg->reg_time_base,
269 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
297 if (pcf2127->cfg->type == PCF2131) {
298 err = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
306 err = regmap_write(pcf2127->regmap, PCF2131_REG_SR_RESET,
315 err = regmap_bulk_write(pcf2127->regmap, pcf2127->cfg->reg_time_base, buf, i);
321 if (pcf2127->cfg->type == PCF2131) {
323 err = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
337 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
343 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL3, &val);
356 return regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
367 struct pcf2127 *pcf2127 = priv;
371 ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
376 return regmap_bulk_read(pcf2127->regmap, PCF2127_REG_RAM_RD_CMD,
383 struct pcf2127 *pcf2127 = priv;
387 ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
392 return regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_WRT_CMD,
401 struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
407 wd_val = ((wdd->timeout * pcf2127->cfg->wdd_clock_hz_x1000) / 1000) + 1;
409 return regmap_write(pcf2127->regmap, pcf2127->cfg->reg_wd_val, wd_val);
441 struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
443 return regmap_write(pcf2127->regmap, pcf2127->cfg->reg_wd_val,
488 static int pcf2127_watchdog_init(struct device *dev, struct pcf2127 *pcf2127)
496 pcf2127->wdd.parent = dev;
497 pcf2127->wdd.info = &pcf2127_wdt_info;
498 pcf2127->wdd.ops = &pcf2127_watchdog_ops;
500 pcf2127->wdd.min_timeout =
502 2, pcf2127->cfg->wdd_clock_hz_x1000);
503 pcf2127->wdd.max_timeout =
505 255, pcf2127->cfg->wdd_clock_hz_x1000);
506 pcf2127->wdd.timeout = PCF2127_WD_DEFAULT_TIMEOUT_S;
509 pcf2127->cfg->wdd_clock_hz_x1000);
511 pcf2127->wdd.min_hw_heartbeat_ms = pcf2127->cfg->wdd_min_hw_heartbeat_ms;
512 pcf2127->wdd.status = WATCHDOG_NOWAYOUT_INIT_STATUS;
514 watchdog_set_drvdata(&pcf2127->wdd, pcf2127);
517 if (pcf2127->cfg->wd_val_reg_readable) {
520 ret = regmap_read(pcf2127->regmap, pcf2127->cfg->reg_wd_val,
526 set_bit(WDOG_HW_RUNNING, &pcf2127->wdd.status);
529 return devm_watchdog_register_device(dev, &pcf2127->wdd);
535 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
540 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL2, &ctrl2);
544 ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
548 ret = regmap_bulk_read(pcf2127->regmap, pcf2127->cfg->regs_alarm_base,
566 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
569 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
575 return pcf2127_wdt_active_ping(&pcf2127->wdd);
580 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
584 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
589 ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
599 ret = regmap_bulk_write(pcf2127->regmap, pcf2127->cfg->regs_alarm_base,
614 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
619 ret = regmap_bulk_read(pcf2127->regmap, pcf2127->cfg->ts[ts_id].reg_base,
652 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
655 if (ts_id >= pcf2127->cfg->ts_count)
659 if (pcf2127->ts_valid[ts_id])
662 ret = pcf2127_rtc_ts_read(dev, &pcf2127->ts[ts_id], ts_id);
664 pcf2127->ts_valid[ts_id] = true;
669 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
673 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL2, &ctrl2);
677 if (pcf2127->cfg->ts_count == 1) {
681 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL1, &ctrl1);
692 regmap_write(pcf2127->regmap, PCF2127_REG_CTRL1,
696 regmap_write(pcf2127->regmap, PCF2127_REG_CTRL2,
702 ret = regmap_read(pcf2127->regmap, PCF2131_REG_CTRL4, &ctrl4);
713 for (i = 0; i < pcf2127->cfg->ts_count; i++) {
720 regmap_write(pcf2127->regmap, PCF2131_REG_CTRL4,
725 regmap_write(pcf2127->regmap, PCF2127_REG_CTRL2,
730 rtc_update_irq(pcf2127->rtc, 1, RTC_IRQF | RTC_AF);
732 pcf2127_wdt_active_ping(&pcf2127->wdd);
752 struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
755 if (ts_id >= pcf2127->cfg->ts_count)
758 if (pcf2127->irq_enabled) {
759 pcf2127->ts_valid[ts_id] = false;
762 ret = regmap_update_bits(pcf2127->regmap,
763 pcf2127->cfg->ts[ts_id].gnd_detect_reg,
764 pcf2127->cfg->ts[ts_id].gnd_detect_bit,
772 if (pcf2127->cfg->ts[ts_id].inter_detect_bit) {
774 ret = regmap_update_bits(pcf2127->regmap,
775 pcf2127->cfg->ts[ts_id].inter_detect_reg,
776 pcf2127->cfg->ts[ts_id].inter_detect_bit,
785 ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
825 struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
829 if (ts_id >= pcf2127->cfg->ts_count)
832 if (pcf2127->irq_enabled) {
833 if (!pcf2127->ts_valid[ts_id])
835 ts = pcf2127->ts[ts_id];
844 ret = regmap_read(pcf2127->regmap,
845 pcf2127->cfg->ts[ts_id].gnd_detect_reg,
850 valid_low = ctrl & pcf2127->cfg->ts[ts_id].gnd_detect_bit;
852 if (pcf2127->cfg->ts[ts_id].inter_detect_bit) {
856 ret = regmap_read(pcf2127->regmap,
857 pcf2127->cfg->ts[ts_id].inter_detect_reg,
862 valid_inter = ctrl & pcf2127->cfg->ts[ts_id].inter_detect_bit;
872 ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
1036 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
1039 if (ts_id >= pcf2127->cfg->ts_count) {
1046 ret = regmap_update_bits(pcf2127->regmap,
1047 pcf2127->cfg->ts[ts_id].reg_base,
1062 ret = regmap_update_bits(pcf2127->regmap, pcf2127->cfg->ts[ts_id].ie_reg,
1063 pcf2127->cfg->ts[ts_id].ie_bit,
1064 pcf2127->cfg->ts[ts_id].ie_bit);
1077 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
1083 ret = regmap_write(pcf2127->regmap,
1088 ret = regmap_write(pcf2127->regmap,
1099 struct pcf2127 *pcf2127;
1105 pcf2127 = devm_kzalloc(dev, sizeof(*pcf2127), GFP_KERNEL);
1106 if (!pcf2127)
1109 pcf2127->regmap = regmap;
1110 pcf2127->cfg = config;
1112 dev_set_drvdata(dev, pcf2127);
1114 pcf2127->rtc = devm_rtc_allocate_device(dev);
1115 if (IS_ERR(pcf2127->rtc))
1116 return PTR_ERR(pcf2127->rtc);
1118 pcf2127->rtc->ops = &pcf2127_rtc_ops;
1119 pcf2127->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
1120 pcf2127->rtc->range_max = RTC_TIMESTAMP_END_2099;
1121 pcf2127->rtc->set_start_time = true; /* Sets actual start to 1970 */
1127 if (pcf2127->cfg->type == PCF2127 || pcf2127->cfg->type == PCF2129) {
1128 set_bit(RTC_FEATURE_ALARM_RES_2S, pcf2127->rtc->features);
1129 clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, pcf2127->rtc->features);
1132 clear_bit(RTC_FEATURE_ALARM, pcf2127->rtc->features);
1154 pcf2127->irq_enabled = true;
1159 set_bit(RTC_FEATURE_ALARM, pcf2127->rtc->features);
1162 if (pcf2127->cfg->has_int_a_b) {
1171 if (pcf2127->cfg->has_nvmem) {
1173 .priv = pcf2127,
1179 ret = devm_rtc_nvmem_register(pcf2127->rtc, &nvmem_cfg);
1186 ret = regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
1191 ret = regmap_read(pcf2127->regmap, pcf2127->cfg->reg_clkout, &val);
1196 ret = regmap_set_bits(pcf2127->regmap, pcf2127->cfg->reg_clkout,
1213 ret = regmap_update_bits(pcf2127->regmap, pcf2127->cfg->reg_wd_ctl,
1219 (pcf2127->cfg->has_bit_wd_ctl_cd0 ? PCF2127_BIT_WD_CTL_CD0 : 0) |
1226 pcf2127_watchdog_init(dev, pcf2127);
1234 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
1247 for (int i = 0; i < pcf2127->cfg->ts_count; i++) {
1253 ret = rtc_add_group(pcf2127->rtc, &pcf2127->cfg->attribute_group);
1260 return devm_rtc_register_device(pcf2127->rtc);
1265 { .compatible = "nxp,pcf2127", .data = &pcf21xx_cfg[PCF2127] },
1353 { "pcf2127", PCF2127 },
1401 .name = "rtc-pcf2127-i2c",
1472 { "pcf2127", PCF2127 },
1482 .name = "rtc-pcf2127-spi",
1518 pr_err("Failed to register pcf2127 i2c driver: %d\n", ret);
1524 pr_err("Failed to register pcf2127 spi driver: %d\n", ret);