Lines Matching refs:rtc_base
47 void __iomem *rtc_base;
55 seconds = readw(priv->rtc_base + REG_RTC_MATCH_VAL_L)
56 | ((unsigned long)readw(priv->rtc_base + REG_RTC_MATCH_VAL_H) << 16);
60 if (!(readw(priv->rtc_base + REG_RTC_CTRL) & INT_MASK_BIT))
71 reg = readw(priv->rtc_base + REG_RTC_CTRL);
76 writew(reg, priv->rtc_base + REG_RTC_CTRL);
86 writew((seconds & 0xFFFF), priv->rtc_base + REG_RTC_MATCH_VAL_L);
87 writew((seconds >> 16) & 0xFFFF, priv->rtc_base + REG_RTC_MATCH_VAL_H);
96 return readw(priv->rtc_base + REG_RTC_CTRL) & CNT_EN_BIT;
103 reg = readw(priv->rtc_base + REG_RTC_CTRL);
105 writew(reg, priv->rtc_base + REG_RTC_CTRL);
117 reg = readw(priv->rtc_base + REG_RTC_CTRL);
118 writew(reg | READ_EN_BIT, priv->rtc_base + REG_RTC_CTRL);
121 while (readw(priv->rtc_base + REG_RTC_CTRL) & READ_EN_BIT)
124 seconds = readw(priv->rtc_base + REG_RTC_CNT_VAL_L)
125 | ((unsigned long)readw(priv->rtc_base + REG_RTC_CNT_VAL_H) << 16);
139 writew(seconds & 0xFFFF, priv->rtc_base + REG_RTC_LOAD_VAL_L);
140 writew((seconds >> 16) & 0xFFFF, priv->rtc_base + REG_RTC_LOAD_VAL_H);
143 reg = readw(priv->rtc_base + REG_RTC_CTRL);
144 writew(reg | LOAD_EN_BIT, priv->rtc_base + REG_RTC_CTRL);
147 while (readw(priv->rtc_base + REG_RTC_CTRL) & LOAD_EN_BIT)
166 reg = readw(priv->rtc_base + REG_RTC_STATUS_INT);
170 reg = readw(priv->rtc_base + REG_RTC_CTRL);
173 writew(reg, priv->rtc_base + REG_RTC_CTRL);
193 priv->rtc_base = devm_platform_ioremap_resource(pdev, 0);
194 if (IS_ERR(priv->rtc_base))
195 return PTR_ERR(priv->rtc_base);
222 writew(rate & 0xFFFF, priv->rtc_base + REG_RTC_FREQ_CW_L);
223 writew((rate >> 16) & 0xFFFF, priv->rtc_base + REG_RTC_FREQ_CW_H);