Lines Matching defs:rtc
15 #include <linux/rtc.h>
86 void (*update_mbus_timing)(struct armada38x_rtc *rtc);
87 u32 (*read_rtc_reg)(struct armada38x_rtc *rtc, u8 rtc_reg);
88 void (*clear_isr)(struct armada38x_rtc *rtc);
89 void (*unmask_interrupt)(struct armada38x_rtc *rtc);
103 static void rtc_delayed_write(u32 val, struct armada38x_rtc *rtc, int offset)
105 writel(0, rtc->regs + RTC_STATUS);
106 writel(0, rtc->regs + RTC_STATUS);
107 writel(val, rtc->regs + offset);
112 static void rtc_update_38x_mbus_timing_params(struct armada38x_rtc *rtc)
116 reg = readl(rtc->regs_soc + RTC_38X_BRIDGE_TIMING_CTL);
121 writel(reg, rtc->regs_soc + RTC_38X_BRIDGE_TIMING_CTL);
124 static void rtc_update_8k_mbus_timing_params(struct armada38x_rtc *rtc)
128 reg = readl(rtc->regs_soc + RTC_8K_BRIDGE_TIMING_CTL0);
133 writel(reg, rtc->regs_soc + RTC_8K_BRIDGE_TIMING_CTL0);
135 reg = readl(rtc->regs_soc + RTC_8K_BRIDGE_TIMING_CTL1);
138 writel(reg, rtc->regs_soc + RTC_8K_BRIDGE_TIMING_CTL1);
141 static u32 read_rtc_register(struct armada38x_rtc *rtc, u8 rtc_reg)
143 return readl(rtc->regs + rtc_reg);
146 static u32 read_rtc_register_38x_wa(struct armada38x_rtc *rtc, u8 rtc_reg)
151 rtc->val_to_freq[i].value = readl(rtc->regs + rtc_reg);
152 rtc->val_to_freq[i].freq = 0;
157 u32 value = rtc->val_to_freq[i].value;
159 while (rtc->val_to_freq[j].freq) {
160 if (rtc->val_to_freq[j].value == value) {
161 rtc->val_to_freq[j].freq++;
167 if (!rtc->val_to_freq[j].freq) {
168 rtc->val_to_freq[j].value = value;
169 rtc->val_to_freq[j].freq = 1;
172 if (rtc->val_to_freq[j].freq > max) {
174 max = rtc->val_to_freq[j].freq;
185 return rtc->val_to_freq[index_max].value;
188 static void armada38x_clear_isr(struct armada38x_rtc *rtc)
190 u32 val = readl(rtc->regs_soc + SOC_RTC_INTERRUPT);
192 writel(val & ~SOC_RTC_ALARM1, rtc->regs_soc + SOC_RTC_INTERRUPT);
195 static void armada38x_unmask_interrupt(struct armada38x_rtc *rtc)
197 u32 val = readl(rtc->regs_soc + SOC_RTC_INTERRUPT);
199 writel(val | SOC_RTC_ALARM1_MASK, rtc->regs_soc + SOC_RTC_INTERRUPT);
202 static void armada8k_clear_isr(struct armada38x_rtc *rtc)
204 writel(RTC_8K_ALARM2, rtc->regs_soc + RTC_8K_ISR);
207 static void armada8k_unmask_interrupt(struct armada38x_rtc *rtc)
209 writel(RTC_8K_ALARM2, rtc->regs_soc + RTC_8K_IMR);
214 struct armada38x_rtc *rtc = dev_get_drvdata(dev);
217 spin_lock_irqsave(&rtc->lock, flags);
218 time = rtc->data->read_rtc_reg(rtc, RTC_TIME);
219 spin_unlock_irqrestore(&rtc->lock, flags);
226 static void armada38x_rtc_reset(struct armada38x_rtc *rtc)
230 reg = rtc->data->read_rtc_reg(rtc, RTC_CONF_TEST);
233 rtc_delayed_write(0, rtc, RTC_CONF_TEST);
235 rtc_delayed_write(0, rtc, RTC_TIME);
236 rtc_delayed_write(SOC_RTC_ALARM1 | SOC_RTC_ALARM2, rtc,
238 rtc_delayed_write(RTC_NOMINAL_TIMING, rtc, RTC_CCR);
240 rtc->initialized = true;
245 struct armada38x_rtc *rtc = dev_get_drvdata(dev);
250 if (!rtc->initialized)
251 armada38x_rtc_reset(rtc);
253 spin_lock_irqsave(&rtc->lock, flags);
254 rtc_delayed_write(time, rtc, RTC_TIME);
255 spin_unlock_irqrestore(&rtc->lock, flags);
262 struct armada38x_rtc *rtc = dev_get_drvdata(dev);
264 u32 reg = ALARM_REG(RTC_ALARM1, rtc->data->alarm);
265 u32 reg_irq = ALARM_REG(RTC_IRQ1_CONF, rtc->data->alarm);
268 spin_lock_irqsave(&rtc->lock, flags);
270 time = rtc->data->read_rtc_reg(rtc, reg);
271 val = rtc->data->read_rtc_reg(rtc, reg_irq) & RTC_IRQ_AL_EN;
273 spin_unlock_irqrestore(&rtc->lock, flags);
283 struct armada38x_rtc *rtc = dev_get_drvdata(dev);
284 u32 reg = ALARM_REG(RTC_ALARM1, rtc->data->alarm);
285 u32 reg_irq = ALARM_REG(RTC_IRQ1_CONF, rtc->data->alarm);
290 spin_lock_irqsave(&rtc->lock, flags);
292 rtc_delayed_write(time, rtc, reg);
295 rtc_delayed_write(RTC_IRQ_AL_EN, rtc, reg_irq);
296 rtc->data->unmask_interrupt(rtc);
299 spin_unlock_irqrestore(&rtc->lock, flags);
307 struct armada38x_rtc *rtc = dev_get_drvdata(dev);
308 u32 reg_irq = ALARM_REG(RTC_IRQ1_CONF, rtc->data->alarm);
311 spin_lock_irqsave(&rtc->lock, flags);
314 rtc_delayed_write(RTC_IRQ_AL_EN, rtc, reg_irq);
316 rtc_delayed_write(0, rtc, reg_irq);
318 spin_unlock_irqrestore(&rtc->lock, flags);
325 struct armada38x_rtc *rtc = data;
328 u32 reg_irq = ALARM_REG(RTC_IRQ1_CONF, rtc->data->alarm);
330 dev_dbg(&rtc->rtc_dev->dev, "%s:irq(%d)\n", __func__, irq);
332 spin_lock(&rtc->lock);
334 rtc->data->clear_isr(rtc);
335 val = rtc->data->read_rtc_reg(rtc, reg_irq);
337 rtc_delayed_write(0, rtc, reg_irq);
339 rtc_delayed_write(1 << rtc->data->alarm, rtc, RTC_STATUS);
341 spin_unlock(&rtc->lock);
350 rtc_update_irq(rtc->rtc_dev, 1, event);
399 struct armada38x_rtc *rtc = dev_get_drvdata(dev);
403 spin_lock_irqsave(&rtc->lock, flags);
404 ccr = rtc->data->read_rtc_reg(rtc, RTC_CCR);
405 spin_unlock_irqrestore(&rtc->lock, flags);
416 struct armada38x_rtc *rtc = dev_get_drvdata(dev);
445 rtc_delayed_write(ccr, rtc, RTC_CCR);
478 .compatible = "marvell,armada-380-rtc",
482 .compatible = "marvell,armada-8k-rtc",
491 struct armada38x_rtc *rtc;
493 rtc = devm_kzalloc(&pdev->dev, sizeof(struct armada38x_rtc),
495 if (!rtc)
498 rtc->data = of_device_get_match_data(&pdev->dev);
500 rtc->val_to_freq = devm_kcalloc(&pdev->dev, SAMPLE_NR,
502 if (!rtc->val_to_freq)
505 spin_lock_init(&rtc->lock);
507 rtc->regs = devm_platform_ioremap_resource_byname(pdev, "rtc");
508 if (IS_ERR(rtc->regs))
509 return PTR_ERR(rtc->regs);
510 rtc->regs_soc = devm_platform_ioremap_resource_byname(pdev, "rtc-soc");
511 if (IS_ERR(rtc->regs_soc))
512 return PTR_ERR(rtc->regs_soc);
514 rtc->irq = platform_get_irq(pdev, 0);
515 if (rtc->irq < 0)
516 return rtc->irq;
518 rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
519 if (IS_ERR(rtc->rtc_dev))
520 return PTR_ERR(rtc->rtc_dev);
522 if (devm_request_irq(&pdev->dev, rtc->irq, armada38x_rtc_alarm_irq,
523 0, pdev->name, rtc) < 0) {
525 rtc->irq = -1;
527 platform_set_drvdata(pdev, rtc);
529 if (rtc->irq != -1)
532 clear_bit(RTC_FEATURE_ALARM, rtc->rtc_dev->features);
535 rtc->data->update_mbus_timing(rtc);
537 rtc->rtc_dev->ops = &armada38x_rtc_ops;
538 rtc->rtc_dev->range_max = U32_MAX;
540 return devm_rtc_register_device(rtc->rtc_dev);
547 struct armada38x_rtc *rtc = dev_get_drvdata(dev);
549 return enable_irq_wake(rtc->irq);
558 struct armada38x_rtc *rtc = dev_get_drvdata(dev);
561 rtc->data->update_mbus_timing(rtc);
563 return disable_irq_wake(rtc->irq);
575 .name = "armada38x-rtc",