Lines Matching refs:adsp
112 struct qcom_adsp *adsp = rproc->priv;
115 total_offset = segment->da + segment->offset + offset - adsp->mem_phys;
116 if (total_offset < 0 || total_offset + size > adsp->mem_size) {
117 dev_err(adsp->dev,
124 memcpy_fromio(dest, adsp->mem_region + total_offset, size);
129 struct qcom_adsp *adsp = rproc->priv;
134 qcom_minidump(rproc, adsp->minidump_id, adsp_segment_dump);
137 static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds,
164 static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds,
175 static int adsp_shutdown_poll_decrypt(struct qcom_adsp *adsp)
182 ret = qcom_scm_pas_shutdown(adsp->pas_id);
190 struct qcom_adsp *adsp = rproc->priv;
198 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
199 if (adsp->dtb_pas_id)
200 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
207 struct qcom_adsp *adsp = rproc->priv;
211 adsp->firmware = fw;
213 if (adsp->dtb_pas_id) {
214 ret = request_firmware(&adsp->dtb_firmware, adsp->dtb_firmware_name, adsp->dev);
216 dev_err(adsp->dev, "request_firmware failed for %s: %d\n",
217 adsp->dtb_firmware_name, ret);
221 ret = qcom_mdt_pas_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name,
222 adsp->dtb_pas_id, adsp->dtb_mem_phys,
223 &adsp->dtb_pas_metadata);
227 ret = qcom_mdt_load_no_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name,
228 adsp->dtb_pas_id, adsp->dtb_mem_region,
229 adsp->dtb_mem_phys, adsp->dtb_mem_size,
230 &adsp->dtb_mem_reloc);
238 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
241 release_firmware(adsp->dtb_firmware);
248 struct qcom_adsp *adsp = rproc->priv;
251 ret = qcom_q6v5_prepare(&adsp->q6v5);
255 ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
259 ret = clk_prepare_enable(adsp->xo);
263 ret = clk_prepare_enable(adsp->aggre2_clk);
267 if (adsp->cx_supply) {
268 ret = regulator_enable(adsp->cx_supply);
273 if (adsp->px_supply) {
274 ret = regulator_enable(adsp->px_supply);
279 if (adsp->dtb_pas_id) {
280 ret = qcom_scm_pas_auth_and_reset(adsp->dtb_pas_id);
282 dev_err(adsp->dev,
288 ret = qcom_mdt_pas_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id,
289 adsp->mem_phys, &adsp->pas_metadata);
293 ret = qcom_mdt_load_no_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id,
294 adsp->mem_region, adsp->mem_phys, adsp->mem_size,
295 &adsp->mem_reloc);
299 qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size);
301 ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
303 dev_err(adsp->dev,
308 ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000));
310 dev_err(adsp->dev, "start timed out\n");
311 qcom_scm_pas_shutdown(adsp->pas_id);
315 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
316 if (adsp->dtb_pas_id)
317 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
320 adsp->firmware = NULL;
325 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
326 if (adsp->dtb_pas_id)
327 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
329 if (adsp->px_supply)
330 regulator_disable(adsp->px_supply);
332 if (adsp->cx_supply)
333 regulator_disable(adsp->cx_supply);
335 clk_disable_unprepare(adsp->aggre2_clk);
337 clk_disable_unprepare(adsp->xo);
339 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
341 qcom_q6v5_unprepare(&adsp->q6v5);
344 adsp->firmware = NULL;
351 struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
353 if (adsp->px_supply)
354 regulator_disable(adsp->px_supply);
355 if (adsp->cx_supply)
356 regulator_disable(adsp->cx_supply);
357 clk_disable_unprepare(adsp->aggre2_clk);
358 clk_disable_unprepare(adsp->xo);
359 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
364 struct qcom_adsp *adsp = rproc->priv;
368 ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon);
370 dev_err(adsp->dev, "timed out on wait\n");
372 ret = qcom_scm_pas_shutdown(adsp->pas_id);
373 if (ret && adsp->decrypt_shutdown)
374 ret = adsp_shutdown_poll_decrypt(adsp);
377 dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
379 if (adsp->dtb_pas_id) {
380 ret = qcom_scm_pas_shutdown(adsp->dtb_pas_id);
382 dev_err(adsp->dev, "failed to shutdown dtb: %d\n", ret);
385 handover = qcom_q6v5_unprepare(&adsp->q6v5);
387 qcom_pas_handover(&adsp->q6v5);
394 struct qcom_adsp *adsp = rproc->priv;
397 offset = da - adsp->mem_reloc;
398 if (offset < 0 || offset + len > adsp->mem_size)
404 return adsp->mem_region + offset;
409 struct qcom_adsp *adsp = rproc->priv;
411 return qcom_q6v5_panic(&adsp->q6v5);
435 static int adsp_init_clock(struct qcom_adsp *adsp)
439 adsp->xo = devm_clk_get(adsp->dev, "xo");
440 if (IS_ERR(adsp->xo)) {
441 ret = PTR_ERR(adsp->xo);
443 dev_err(adsp->dev, "failed to get xo clock");
447 adsp->aggre2_clk = devm_clk_get_optional(adsp->dev, "aggre2");
448 if (IS_ERR(adsp->aggre2_clk)) {
449 ret = PTR_ERR(adsp->aggre2_clk);
451 dev_err(adsp->dev,
459 static int adsp_init_regulator(struct qcom_adsp *adsp)
461 adsp->cx_supply = devm_regulator_get_optional(adsp->dev, "cx");
462 if (IS_ERR(adsp->cx_supply)) {
463 if (PTR_ERR(adsp->cx_supply) == -ENODEV)
464 adsp->cx_supply = NULL;
466 return PTR_ERR(adsp->cx_supply);
469 if (adsp->cx_supply)
470 regulator_set_load(adsp->cx_supply, 100000);
472 adsp->px_supply = devm_regulator_get_optional(adsp->dev, "px");
473 if (IS_ERR(adsp->px_supply)) {
474 if (PTR_ERR(adsp->px_supply) == -ENODEV)
475 adsp->px_supply = NULL;
477 return PTR_ERR(adsp->px_supply);
520 static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds,
523 struct device *dev = adsp->dev;
536 static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
541 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
543 dev_err(adsp->dev, "no memory-region specified\n");
550 dev_err(adsp->dev, "unable to resolve memory-region\n");
554 adsp->mem_phys = adsp->mem_reloc = rmem->base;
555 adsp->mem_size = rmem->size;
556 adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
557 if (!adsp->mem_region) {
558 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
559 &rmem->base, adsp->mem_size);
563 if (!adsp->dtb_pas_id)
566 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 1);
568 dev_err(adsp->dev, "no dtb memory-region specified\n");
575 dev_err(adsp->dev, "unable to resolve dtb memory-region\n");
579 adsp->dtb_mem_phys = adsp->dtb_mem_reloc = rmem->base;
580 adsp->dtb_mem_size = rmem->size;
581 adsp->dtb_mem_region = devm_ioremap_wc(adsp->dev, adsp->dtb_mem_phys, adsp->dtb_mem_size);
582 if (!adsp->dtb_mem_region) {
583 dev_err(adsp->dev, "unable to map dtb memory region: %pa+%zx\n",
584 &rmem->base, adsp->dtb_mem_size);
591 static int adsp_assign_memory_region(struct qcom_adsp *adsp)
598 if (!adsp->region_assign_idx)
601 node = of_parse_phandle(adsp->dev->of_node, "memory-region", adsp->region_assign_idx);
606 dev_err(adsp->dev, "unable to resolve shareable memory-region\n");
613 adsp->region_assign_phys = rmem->base;
614 adsp->region_assign_size = rmem->size;
615 adsp->region_assign_perms = BIT(QCOM_SCM_VMID_HLOS);
617 ret = qcom_scm_assign_mem(adsp->region_assign_phys,
618 adsp->region_assign_size,
619 &adsp->region_assign_perms,
622 dev_err(adsp->dev, "assign memory failed\n");
629 static void adsp_unassign_memory_region(struct qcom_adsp *adsp)
634 if (!adsp->region_assign_idx)
640 ret = qcom_scm_assign_mem(adsp->region_assign_phys,
641 adsp->region_assign_size,
642 &adsp->region_assign_perms,
645 dev_err(adsp->dev, "unassign memory failed\n");
651 struct qcom_adsp *adsp;
681 rproc = rproc_alloc(&pdev->dev, pdev->name, ops, fw_name, sizeof(*adsp));
691 adsp = rproc->priv;
692 adsp->dev = &pdev->dev;
693 adsp->rproc = rproc;
694 adsp->minidump_id = desc->minidump_id;
695 adsp->pas_id = desc->pas_id;
696 adsp->info_name = desc->sysmon_name;
697 adsp->decrypt_shutdown = desc->decrypt_shutdown;
698 adsp->region_assign_idx = desc->region_assign_idx;
700 adsp->dtb_firmware_name = dtb_fw_name;
701 adsp->dtb_pas_id = desc->dtb_pas_id;
703 platform_set_drvdata(pdev, adsp);
705 ret = device_init_wakeup(adsp->dev, true);
709 ret = adsp_alloc_memory_region(adsp);
713 ret = adsp_assign_memory_region(adsp);
717 ret = adsp_init_clock(adsp);
721 ret = adsp_init_regulator(adsp);
725 ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds,
729 adsp->proxy_pd_count = ret;
731 ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state,
736 qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name);
737 qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
738 adsp->sysmon = qcom_add_sysmon_subdev(rproc,
741 if (IS_ERR(adsp->sysmon)) {
742 ret = PTR_ERR(adsp->sysmon);
746 qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
754 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
756 device_init_wakeup(adsp->dev, false);
764 struct qcom_adsp *adsp = platform_get_drvdata(pdev);
766 rproc_del(adsp->rproc);
768 qcom_q6v5_deinit(&adsp->q6v5);
769 adsp_unassign_memory_region(adsp);
770 qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
771 qcom_remove_sysmon_subdev(adsp->sysmon);
772 qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev);
773 qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
774 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
775 device_init_wakeup(adsp->dev, false);
776 rproc_free(adsp->rproc);
781 .firmware_name = "adsp.mdt",
785 .sysmon_name = "adsp",
791 .firmware_name = "adsp.mdt",
794 .load_state = "adsp",
796 .sysmon_name = "adsp",
802 .firmware_name = "adsp.mdt",
810 .load_state = "adsp",
812 .sysmon_name = "adsp",
818 .firmware_name = "adsp.mdt",
825 .load_state = "adsp",
827 .sysmon_name = "adsp",
833 .firmware_name = "adsp.mdt",
841 .load_state = "adsp",
843 .sysmon_name = "adsp",
849 .firmware_name = "adsp.mdt",
857 .load_state = "adsp",
859 .sysmon_name = "adsp",
865 .firmware_name = "adsp.mdt",
873 .sysmon_name = "adsp",
1095 .firmware_name = "adsp.mdt",
1106 .load_state = "adsp",
1108 .sysmon_name = "adsp",
1154 { .compatible = "qcom,msm8226-adsp-pil", .data = &adsp_resource_init},
1155 { .compatible = "qcom,msm8953-adsp-pil", .data = &msm8996_adsp_resource},
1156 { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
1157 { .compatible = "qcom,msm8996-adsp-pil", .data = &msm8996_adsp_resource},
1159 { .compatible = "qcom,msm8998-adsp-pas", .data = &msm8996_adsp_resource},
1161 { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init },
1166 { .compatible = "qcom,sc8180x-adsp-pas", .data = &sm8150_adsp_resource},
1169 { .compatible = "qcom,sc8280xp-adsp-pas", .data = &sm8250_adsp_resource},
1172 { .compatible = "qcom,sdm660-adsp-pas", .data = &adsp_resource_init},
1173 { .compatible = "qcom,sdm845-adsp-pas", .data = &sdm845_adsp_resource_init},
1177 { .compatible = "qcom,sm6115-adsp-pas", .data = &adsp_resource_init},
1180 { .compatible = "qcom,sm6350-adsp-pas", .data = &sm6350_adsp_resource},
1183 { .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource},
1187 { .compatible = "qcom,sm8250-adsp-pas", .data = &sm8250_adsp_resource},
1190 { .compatible = "qcom,sm8350-adsp-pas", .data = &sm8350_adsp_resource},
1194 { .compatible = "qcom,sm8450-adsp-pas", .data = &sm8350_adsp_resource},
1198 { .compatible = "qcom,sm8550-adsp-pas", .data = &sm8550_adsp_resource},