Lines Matching defs:enable
24 /* Pin control enable input pins. */
42 * Used with enable parameters to specify that hardware default register values
59 * used to enable the regulator, if any
64 * set, then pin control enable hardware registers
655 int severity, bool enable)
660 if (lim_uA || !enable || severity != REGULATOR_SEVERITY_PROT)
1048 spmi_regulator_common_set_bypass(struct regulator_dev *rdev, bool enable)
1054 if (enable)
1061 spmi_regulator_common_get_bypass(struct regulator_dev *rdev, bool *enable)
1068 *enable = val & SPMI_COMMON_MODE_BYPASS_MASK;
1299 * Reset the OCP count if there is a large delay between switch enable
1411 .enable = regulator_enable_regmap,
1426 .enable = regulator_enable_regmap,
1443 .enable = regulator_enable_regmap,
1455 .enable = spmi_regulator_vs_enable,
1466 .enable = regulator_enable_regmap,
1477 .enable = regulator_enable_regmap,
1492 .enable = regulator_enable_regmap,
1506 .enable = regulator_enable_regmap,
1521 .enable = regulator_enable_regmap,
1538 .enable = regulator_enable_regmap,
1553 .enable = regulator_enable_regmap,
1566 .enable = regulator_enable_regmap,
1855 /* Set up enable pin control. */
1932 of_property_read_u32(node, "qcom,pin-ctrl-enable",