Lines Matching refs:pc
64 struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
65 u32 enable_conf = pc->data->enable_conf;
71 ret = clk_enable(pc->pclk);
75 ret = clk_enable(pc->clk);
79 clk_rate = clk_get_rate(pc->clk);
81 tmp = readl_relaxed(pc->base + pc->data->regs.period);
82 tmp *= pc->data->prescaler * NSEC_PER_SEC;
85 tmp = readl_relaxed(pc->base + pc->data->regs.duty);
86 tmp *= pc->data->prescaler * NSEC_PER_SEC;
89 val = readl_relaxed(pc->base + pc->data->regs.ctrl);
92 if (pc->data->supports_polarity && !(val & PWM_DUTY_POSITIVE))
97 clk_disable(pc->clk);
98 clk_disable(pc->pclk);
106 struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
111 clk_rate = clk_get_rate(pc->clk);
120 pc->data->prescaler * NSEC_PER_SEC);
123 duty = DIV_ROUND_CLOSEST_ULL(div, pc->data->prescaler * NSEC_PER_SEC);
129 ctrl = readl_relaxed(pc->base + pc->data->regs.ctrl);
130 if (pc->data->supports_lock) {
132 writel_relaxed(ctrl, pc->base + pc->data->regs.ctrl);
135 writel(period, pc->base + pc->data->regs.period);
136 writel(duty, pc->base + pc->data->regs.duty);
138 if (pc->data->supports_polarity) {
151 if (pc->data->supports_lock)
154 writel(ctrl, pc->base + pc->data->regs.ctrl);
161 struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
162 u32 enable_conf = pc->data->enable_conf;
167 ret = clk_enable(pc->clk);
172 val = readl_relaxed(pc->base + pc->data->regs.ctrl);
179 writel_relaxed(val, pc->base + pc->data->regs.ctrl);
182 clk_disable(pc->clk);
190 struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
195 ret = clk_enable(pc->pclk);
199 ret = clk_enable(pc->clk);
207 !pc->data->supports_lock) {
222 clk_disable(pc->clk);
223 clk_disable(pc->pclk);
301 struct rockchip_pwm_chip *pc;
310 pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
311 if (!pc)
314 pc->base = devm_platform_ioremap_resource(pdev, 0);
315 if (IS_ERR(pc->base))
316 return PTR_ERR(pc->base);
318 pc->clk = devm_clk_get(&pdev->dev, "pwm");
319 if (IS_ERR(pc->clk)) {
320 pc->clk = devm_clk_get(&pdev->dev, NULL);
321 if (IS_ERR(pc->clk))
322 return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk),
329 pc->pclk = devm_clk_get(&pdev->dev, "pclk");
331 pc->pclk = pc->clk;
333 if (IS_ERR(pc->pclk))
334 return dev_err_probe(&pdev->dev, PTR_ERR(pc->pclk), "Can't get APB clk\n");
336 ret = clk_prepare_enable(pc->clk);
340 ret = clk_prepare_enable(pc->pclk);
346 platform_set_drvdata(pdev, pc);
348 pc->data = id->data;
349 pc->chip.dev = &pdev->dev;
350 pc->chip.ops = &rockchip_pwm_ops;
351 pc->chip.npwm = 1;
353 enable_conf = pc->data->enable_conf;
354 ctrl = readl_relaxed(pc->base + pc->data->regs.ctrl);
357 ret = pwmchip_add(&pc->chip);
365 clk_disable(pc->clk);
367 clk_disable(pc->pclk);
372 clk_disable_unprepare(pc->pclk);
374 clk_disable_unprepare(pc->clk);
381 struct rockchip_pwm_chip *pc = platform_get_drvdata(pdev);
383 pwmchip_remove(&pc->chip);
385 clk_unprepare(pc->pclk);
386 clk_unprepare(pc->clk);