Lines Matching defs:data
46 const struct mtk_pwm_data *data;
59 u32 mask, u32 data)
66 value |= data;
83 mdp->data->enable_mask, 0x0);
137 if (mdp->data->bls_debug && !mdp->data->has_commit) {
142 mtk_disp_pwm_update_bits(mdp, mdp->data->bls_debug,
143 mdp->data->bls_debug_mask,
144 mdp->data->bls_debug_mask);
145 mtk_disp_pwm_update_bits(mdp, mdp->data->con0,
146 mdp->data->con0_sel,
147 mdp->data->con0_sel);
150 mtk_disp_pwm_update_bits(mdp, mdp->data->con0,
153 mtk_disp_pwm_update_bits(mdp, mdp->data->con1,
157 if (mdp->data->has_commit) {
158 mtk_disp_pwm_update_bits(mdp, mdp->data->commit,
159 mdp->data->commit_mask,
160 mdp->data->commit_mask);
161 mtk_disp_pwm_update_bits(mdp, mdp->data->commit,
162 mdp->data->commit_mask,
166 mtk_disp_pwm_update_bits(mdp, DISP_PWM_EN, mdp->data->enable_mask,
167 mdp->data->enable_mask);
200 if (mdp->data->bls_debug)
201 mtk_disp_pwm_update_bits(mdp, mdp->data->bls_debug,
202 mdp->data->bls_debug_mask,
203 mdp->data->bls_debug_mask);
206 con0 = readl(mdp->base + mdp->data->con0);
207 con1 = readl(mdp->base + mdp->data->con1);
209 state->enabled = !!(pwm_en & mdp->data->enable_mask);
242 mdp->data = of_device_get_match_data(&pdev->dev);
309 { .compatible = "mediatek,mt2701-disp-pwm", .data = &mt2701_pwm_data},
310 { .compatible = "mediatek,mt6595-disp-pwm", .data = &mt8173_pwm_data},
311 { .compatible = "mediatek,mt8173-disp-pwm", .data = &mt8173_pwm_data},
312 { .compatible = "mediatek,mt8183-disp-pwm", .data = &mt8183_pwm_data},