Lines Matching defs:state
108 * before attempting to read its state. Reading the registers yields
134 static u64 mchp_core_pwm_calc_duty(const struct pwm_state *state, u64 clk_rate,
146 duty_steps = mul_u64_u64_div_u64(state->duty_cycle, clk_rate, tmp);
152 const struct pwm_state *state, u64 duty_steps,
168 if (state->polarity == PWM_POLARITY_INVERSED) {
185 static int mchp_core_pwm_calc_period(const struct pwm_state *state, unsigned long clk_rate,
212 tmp = mul_u64_u64_div_u64(state->period, clk_rate, NSEC_PER_SEC);
275 const struct pwm_state *state)
284 if (!state->enabled) {
285 mchp_core_pwm_enable(chip, pwm, false, pwm->state.period);
298 ret = mchp_core_pwm_calc_period(state, clk_rate, &prescale, &period_steps);
338 duty_steps = mchp_core_pwm_calc_duty(state, clk_rate, prescale, period_steps);
353 mchp_core_pwm_apply_duty(chip, pwm, state, duty_steps, period_steps);
355 mchp_core_pwm_enable(chip, pwm, true, pwm->state.period);
361 const struct pwm_state *state)
370 ret = mchp_core_pwm_apply_locked(chip, pwm, state);
378 struct pwm_state *state)
390 state->enabled = true;
392 state->enabled = false;
412 state->period = (period_steps + 1) * (prescale + 1);
413 state->period *= NSEC_PER_SEC;
414 state->period = DIV64_U64_ROUND_UP(state->period, rate);
422 state->duty_cycle = state->period;
423 state->period *= 2;
426 state->duty_cycle = duty_steps * (prescale + 1) * NSEC_PER_SEC;
427 state->duty_cycle = DIV64_U64_ROUND_UP(state->duty_cycle, rate);
430 state->polarity = negedge < posedge ? PWM_POLARITY_INVERSED : PWM_POLARITY_NORMAL;