Lines Matching defs:prescale
135 u8 prescale, u8 period_steps)
142 * step_in_ns = (prescale * NSEC_PER_SEC) / clk_rate
145 tmp = (((u64)prescale) + 1) * NSEC_PER_SEC;
186 u16 *prescale, u16 *period_steps)
191 * Calculate the period cycles and prescale values.
194 * (prescale + 1) * (period_steps + 1)
204 * The prescale and period_steps registers operate similarly to
214 *prescale = MCHPCOREPWM_PRESCALE_MAX;
222 * prescale & period_steps values.
230 * to calculate prescale actually calculates its upper bound.
246 * This "optimal" value for prescale is be calculated using the maximum
250 * prescale = ------------------------- - 1
258 *prescale = ((u16)tmp) / (MCHPCOREPWM_PERIOD_STEPS_MAX + 1) - 1;
261 * period_steps can be computed from prescale:
264 * NSEC_PER_SEC * (prescale + 1)
267 * was used to compute prescale.
281 u16 prescale, period_steps;
298 ret = mchp_core_pwm_calc_period(state, clk_rate, &prescale, &period_steps);
320 if ((period_steps + 1) * (prescale + 1) <
334 prescale = hw_prescale;
338 duty_steps = mchp_core_pwm_calc_duty(state, clk_rate, prescale, period_steps);
349 writel_relaxed(prescale, mchp_core_pwm->base + MCHPCOREPWM_PRESCALE);
382 u16 prescale, period_steps;
400 * (prescale + 1) * (period_steps + 1)
405 * The prescale and period_steps registers operate similarly to
409 prescale = readb_relaxed(mchp_core_pwm->base + MCHPCOREPWM_PRESCALE);
412 state->period = (period_steps + 1) * (prescale + 1);
426 state->duty_cycle = duty_steps * (prescale + 1) * NSEC_PER_SEC;