Lines Matching defs:imx
98 static int pwm_imx27_clk_prepare_enable(struct pwm_imx27_chip *imx)
102 ret = clk_prepare_enable(imx->clk_ipg);
106 ret = clk_prepare_enable(imx->clk_per);
108 clk_disable_unprepare(imx->clk_ipg);
115 static void pwm_imx27_clk_disable_unprepare(struct pwm_imx27_chip *imx)
117 clk_disable_unprepare(imx->clk_per);
118 clk_disable_unprepare(imx->clk_ipg);
124 struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);
129 ret = pwm_imx27_clk_prepare_enable(imx);
133 val = readl(imx->mmio_base + MX3_PWMCR);
152 pwm_clk = clk_get_rate(imx->clk_per);
153 val = readl(imx->mmio_base + MX3_PWMPR);
165 val = readl(imx->mmio_base + MX3_PWMSAR);
167 val = imx->duty_cycle;
172 pwm_imx27_clk_disable_unprepare(imx);
179 struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);
184 writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR);
187 cr = readl(imx->mmio_base + MX3_PWMCR);
198 struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);
204 sr = readl(imx->mmio_base + MX3_PWMSR);
211 sr = readl(imx->mmio_base + MX3_PWMSR);
221 struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);
230 clkrate = clk_get_rate(imx->clk_per);
245 * according to imx pwm RM, the real period value should be PERIOD
260 ret = pwm_imx27_clk_prepare_enable(imx);
267 writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
268 writel(period_cycles, imx->mmio_base + MX3_PWMPR);
274 imx->duty_cycle = duty_cycles;
288 writel(cr, imx->mmio_base + MX3_PWMCR);
291 pwm_imx27_clk_disable_unprepare(imx);
310 struct pwm_imx27_chip *imx;
314 imx = devm_kzalloc(&pdev->dev, sizeof(*imx), GFP_KERNEL);
315 if (imx == NULL)
318 imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
319 if (IS_ERR(imx->clk_ipg))
320 return dev_err_probe(&pdev->dev, PTR_ERR(imx->clk_ipg),
323 imx->clk_per = devm_clk_get(&pdev->dev, "per");
324 if (IS_ERR(imx->clk_per))
325 return dev_err_probe(&pdev->dev, PTR_ERR(imx->clk_per),
328 imx->chip.ops = &pwm_imx27_ops;
329 imx->chip.dev = &pdev->dev;
330 imx->chip.npwm = 1;
332 imx->mmio_base = devm_platform_ioremap_resource(pdev, 0);
333 if (IS_ERR(imx->mmio_base))
334 return PTR_ERR(imx->mmio_base);
336 ret = pwm_imx27_clk_prepare_enable(imx);
341 pwmcr = readl(imx->mmio_base + MX3_PWMCR);
343 pwm_imx27_clk_disable_unprepare(imx);
345 return devm_pwmchip_add(&pdev->dev, &imx->chip);