Lines Matching refs:tpm
92 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip);
96 rate = clk_get_rate(tpm->clk);
139 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip);
144 state->period = tpm->real_period;
147 rate = clk_get_rate(tpm->clk);
148 val = readl(tpm->base + PWM_IMX_TPM_SC);
150 tmp = readl(tpm->base + PWM_IMX_TPM_CnV(pwm->hwpwm));
155 val = readl(tpm->base + PWM_IMX_TPM_CnSC(pwm->hwpwm));
177 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip);
184 if (state->period != tpm->real_period) {
191 if (tpm->user_count > 1)
194 val = readl(tpm->base + PWM_IMX_TPM_SC);
203 writel(val, tpm->base + PWM_IMX_TPM_SC);
213 writel(p->mod, tpm->base + PWM_IMX_TPM_MOD);
214 tpm->real_period = state->period;
233 writel(p->val, tpm->base + PWM_IMX_TPM_CnV(pwm->hwpwm));
239 timeout = jiffies + msecs_to_jiffies(tpm->real_period /
241 while (readl(tpm->base + PWM_IMX_TPM_MOD) != p->mod
242 || readl(tpm->base + PWM_IMX_TPM_CnV(pwm->hwpwm))
256 val = readl(tpm->base + PWM_IMX_TPM_CnSC(pwm->hwpwm));
272 writel(val, tpm->base + PWM_IMX_TPM_CnSC(pwm->hwpwm));
276 val = readl(tpm->base + PWM_IMX_TPM_SC);
278 if (++tpm->enable_count == 1)
281 if (--tpm->enable_count == 0)
284 writel(val, tpm->base + PWM_IMX_TPM_SC);
294 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip);
303 mutex_lock(&tpm->lock);
305 mutex_unlock(&tpm->lock);
312 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip);
314 mutex_lock(&tpm->lock);
315 tpm->user_count++;
316 mutex_unlock(&tpm->lock);
323 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip);
325 mutex_lock(&tpm->lock);
326 tpm->user_count--;
327 mutex_unlock(&tpm->lock);
340 struct imx_tpm_pwm_chip *tpm;
344 tpm = devm_kzalloc(&pdev->dev, sizeof(*tpm), GFP_KERNEL);
345 if (!tpm)
348 platform_set_drvdata(pdev, tpm);
350 tpm->base = devm_platform_ioremap_resource(pdev, 0);
351 if (IS_ERR(tpm->base))
352 return PTR_ERR(tpm->base);
354 tpm->clk = devm_clk_get(&pdev->dev, NULL);
355 if (IS_ERR(tpm->clk))
356 return dev_err_probe(&pdev->dev, PTR_ERR(tpm->clk),
359 ret = clk_prepare_enable(tpm->clk);
366 tpm->chip.dev = &pdev->dev;
367 tpm->chip.ops = &imx_tpm_pwm_ops;
370 val = readl(tpm->base + PWM_IMX_TPM_PARAM);
371 tpm->chip.npwm = FIELD_GET(PWM_IMX_TPM_PARAM_CHAN, val);
373 mutex_init(&tpm->lock);
375 ret = pwmchip_add(&tpm->chip);
378 clk_disable_unprepare(tpm->clk);
386 struct imx_tpm_pwm_chip *tpm = platform_get_drvdata(pdev);
388 pwmchip_remove(&tpm->chip);
390 clk_disable_unprepare(tpm->clk);
395 struct imx_tpm_pwm_chip *tpm = dev_get_drvdata(dev);
397 if (tpm->enable_count > 0)
405 tpm->real_period = 0;
407 clk_disable_unprepare(tpm->clk);
414 struct imx_tpm_pwm_chip *tpm = dev_get_drvdata(dev);
417 ret = clk_prepare_enable(tpm->clk);
435 .name = "imx7ulp-tpm-pwm",