Lines Matching refs:on_cycles
55 u64 on_cycles, off_cycles;
57 on_cycles = mul_u64_u64_div_u64(fpwm->clkrate,
59 if (on_cycles > 0xFFFFFFFF)
60 on_cycles = 0xFFFFFFFF;
63 state->period, NSEC_PER_SEC) - on_cycles;
67 writel(on_cycles, fpwm->base + APPLE_PWM_ON_CYCLES);
81 u32 on_cycles, off_cycles, ctrl;
86 on_cycles = readl(fpwm->base + APPLE_PWM_ON_CYCLES);
91 // on_cycles + off_cycles is 33 bits, NSEC_PER_SEC is 30, there is no overflow
92 state->duty_cycle = DIV64_U64_ROUND_UP((u64)on_cycles * NSEC_PER_SEC, fpwm->clkrate);
93 state->period = DIV64_U64_ROUND_UP(((u64)off_cycles + (u64)on_cycles) *