Lines Matching defs:enable

105 	u32	enable;
187 	u32	enable;
248 	int (*enable)(void *priv, u32 req, bool enable);
378 static int ptp_ocp_ts_enable(void *priv, u32 req, bool enable);
381 static int ptp_ocp_signal_enable(void *priv, u32 req, bool enable);
479 			.enable = ptp_ocp_ts_enable,
488 			.enable = ptp_ocp_ts_enable,
497 			.enable = ptp_ocp_ts_enable,
506 			.enable = ptp_ocp_ts_enable,
515 			.enable = ptp_ocp_ts_enable,
525 			.enable = ptp_ocp_ts_enable,
534 			.enable = ptp_ocp_signal_enable,
543 			.enable = ptp_ocp_signal_enable,
552 			.enable = ptp_ocp_signal_enable,
561 			.enable = ptp_ocp_signal_enable,
726 			.enable = ptp_ocp_ts_enable,
735 			.enable = ptp_ocp_ts_enable,
744 			.enable = ptp_ocp_ts_enable,
753 			.enable = ptp_ocp_ts_enable,
762 			.enable = ptp_ocp_ts_enable,
772 			.enable = ptp_ocp_ts_enable,
1204 		err = ext->info->enable(ext, req, on);
1249 	.enable		= ptp_ocp_enable,
1384 	/* If there is a clock supervisor, then enable the watchdog */
1803 	u32 enable, status;
1808 	enable = ioread32(&reg->enable);
1812 	if (status || !enable) {
1814 		iowrite32(0, &reg->enable);
1887 ptp_ocp_signal_enable(void *priv, u32 req, bool enable)
1898 	iowrite32(0, &reg->enable);
1900 	if (!enable)
1919 	iowrite32(1, &reg->intr_mask);		/* enable interrupt */
1920 	iowrite32(3, &reg->enable);		/* valid & enable */
1962 ptp_ocp_ts_enable(void *priv, u32 req, bool enable)
1971 		if (enable)
1981 	if (enable) {
1982 		iowrite32(1, &reg->enable);
1987 		iowrite32(0, &reg->enable);
1996 	ext->info->enable(ext, ~0, false);
2100 	iowrite32(1, &bp->nmea_out->ctrl);		/* enable */
2108 	iowrite32(0, &reg->enable);		/* disable */
2163 ptp_ocp_enable_fpga(u32 __iomem *reg, u32 bit, bool enable)
2170 	if (on ^ enable) {
2172 		ctrl |= enable ? bit : 0;
2178 ptp_ocp_irig_out(struct ptp_ocp *bp, bool enable)
2181 				   IRIG_M_CTRL_ENABLE, enable);
2185 ptp_ocp_irig_in(struct ptp_ocp *bp, bool enable)
2188 				   IRIG_S_CTRL_ENABLE, enable);
2192 ptp_ocp_dcf_out(struct ptp_ocp *bp, bool enable)
2195 				   DCF_M_CTRL_ENABLE, enable);
2199 ptp_ocp_dcf_in(struct ptp_ocp *bp, bool enable)
2202 				   DCF_S_CTRL_ENABLE, enable);
2730 		val |= SMA_ENABLE;		/* add enable bit */
3585 	val = ioread32(&reg->enable);
3694 		on = ioread32(&ts_reg->enable);
3702 		on = ioread32(&ts_reg->enable);
3710 		on = ioread32(&ts_reg->enable);
3718 		on = ioread32(&ts_reg->enable);
3726 		on = ioread32(&ts_reg->enable);
3735 		on = ioread32(&ts_reg->enable);