Lines Matching defs:fw_ver
65 u16 scratch = IDTCM_FW_REG(idtcm->fw_ver, V520, SCRATCH);
245 u16 tod_read_cmd = IDTCM_FW_REG(idtcm->fw_ver, V520, TOD_READ_SECONDARY_CMD);
402 u16 tod_read_cmd = IDTCM_FW_REG(idtcm->fw_ver, V520, TOD_READ_SECONDARY_CMD);
427 u16 tod_read_cmd = IDTCM_FW_REG(idtcm->fw_ver, V520, TOD_READ_PRIMARY_CMD);
489 u16 tod_read_cmd = IDTCM_FW_REG(idtcm->fw_ver, V520, TOD_READ_PRIMARY_CMD);
1073 IDTCM_FW_REG(idtcm->fw_ver, V520, SM_RESET),
1256 u16 scratch = IDTCM_FW_REG(idtcm->fw_ver, V520, SCRATCH);
1335 base = get_output_base_addr(idtcm->fw_ver, outn);
1382 IDTCM_FW_REG(idtcm->fw_ver, V520, DPLL_MODE),
1400 IDTCM_FW_REG(idtcm->fw_ver, V520, DPLL_MODE),
1410 IDTCM_FW_REG(idtcm->fw_ver, V520, DPLL_MODE),
1971 u16 tod_cfg = IDTCM_FW_REG(idtcm->fw_ver, V520, TOD_CFG);
1988 if (idtcm->fw_ver < V487)
2016 idtcm->fw_ver = idtcm_fw_version(idtcm->version);
2098 channel->dpll_n = IDTCM_FW_REG(idtcm->fw_ver, V520, DPLL_2);
2114 channel->dpll_n = IDTCM_FW_REG(idtcm->fw_ver, V520, DPLL_4);
2130 channel->dpll_n = IDTCM_FW_REG(idtcm->fw_ver, V520, DPLL_6);
2191 enum fw_version fw_ver = channel->idtcm->fw_ver;
2196 channel->tod_read_primary = IDTCM_FW_REG(fw_ver, V520, TOD_READ_PRIMARY_0);
2197 channel->tod_read_secondary = IDTCM_FW_REG(fw_ver, V520, TOD_READ_SECONDARY_0);
2198 channel->tod_write = IDTCM_FW_REG(fw_ver, V520, TOD_WRITE_0);
2199 channel->tod_n = IDTCM_FW_REG(fw_ver, V520, TOD_0);
2203 channel->tod_read_primary = IDTCM_FW_REG(fw_ver, V520, TOD_READ_PRIMARY_1);
2204 channel->tod_read_secondary = IDTCM_FW_REG(fw_ver, V520, TOD_READ_SECONDARY_1);
2205 channel->tod_write = IDTCM_FW_REG(fw_ver, V520, TOD_WRITE_1);
2206 channel->tod_n = IDTCM_FW_REG(fw_ver, V520, TOD_1);
2210 channel->tod_read_primary = IDTCM_FW_REG(fw_ver, V520, TOD_READ_PRIMARY_2);
2211 channel->tod_read_secondary = IDTCM_FW_REG(fw_ver, V520, TOD_READ_SECONDARY_2);
2212 channel->tod_write = IDTCM_FW_REG(fw_ver, V520, TOD_WRITE_2);
2213 channel->tod_n = IDTCM_FW_REG(fw_ver, V520, TOD_2);
2217 channel->tod_read_primary = IDTCM_FW_REG(fw_ver, V520, TOD_READ_PRIMARY_3);
2218 channel->tod_read_secondary = IDTCM_FW_REG(fw_ver, V520, TOD_READ_SECONDARY_3);
2219 channel->tod_write = IDTCM_FW_REG(fw_ver, V520, TOD_WRITE_3);
2220 channel->tod_n = IDTCM_FW_REG(fw_ver, V520, TOD_3);
2254 if (idtcm->fw_ver < V487)