Lines Matching refs:reset
2 * Atmel AT91 SAM9 & SAMA5 SoCs reset code
20 #include <linux/reset-controller.h>
26 #include <dt-bindings/reset/sama7g5-reset.h>
47 * enum reset_type - reset types
48 * @RESET_TYPE_GENERAL: first power-up reset
51 * @RESET_TYPE_SOFTWARE: processor reset required by software
55 * @RESET_TYPE_ULP2: ULP2 reset
69 * struct at91_reset - AT91 reset specific data structure
70 * @rstc_base: base address for system reset
72 * @dev_base: base address for devices reset
74 * @data: platform specific reset data
75 * @rcdev: reset controller device
76 * @lock: lock for devices reset register access
77 * @nb: reset notifier block
78 * @args: SoC specific system reset arguments
97 * struct at91_reset_data - AT91 reset data
98 * @reset_args: SoC specific system reset arguments
100 * @device_reset_min_id: min id for device reset
101 * @device_reset_max_id: max id for device reset
112 * reset register it can be left driving the data bus and
118 struct at91_reset *reset = container_of(this, struct at91_reset, nb);
141 : "r" (reset->ramc_base[0]),
142 "r" (reset->ramc_base[1]),
143 "r" (reset->rstc_base),
146 "r" (reset->data->reset_args),
147 "r" (reset->ramc_lpr)
153 static const char *at91_reset_reason(struct at91_reset *reset)
155 u32 reg = readl(reset->rstc_base + AT91_RSTC_SR);
195 struct at91_reset *reset = platform_get_drvdata(pdev);
197 return sprintf(buf, "%s\n", at91_reset_reason(reset));
260 struct at91_reset *reset = to_at91_reset(rcdev);
264 spin_lock_irqsave(&reset->lock, flags);
265 val = readl_relaxed(reset->dev_base);
270 writel_relaxed(val, reset->dev_base);
271 spin_unlock_irqrestore(&reset->lock, flags);
291 struct at91_reset *reset = to_at91_reset(rcdev);
294 val = readl_relaxed(reset->dev_base);
308 struct at91_reset *reset = to_at91_reset(rcdev);
310 if (!reset->data->n_device_reset ||
311 (reset_spec->args[0] < reset->data->device_reset_min_id ||
312 reset_spec->args[0] > reset->data->device_reset_max_id))
318 static int at91_rcdev_init(struct at91_reset *reset,
321 if (!reset->data->n_device_reset)
324 reset->dev_base = devm_of_iomap(&pdev->dev, pdev->dev.of_node, 1,
326 if (IS_ERR(reset->dev_base))
329 spin_lock_init(&reset->lock);
330 reset->rcdev.ops = &at91_reset_ops;
331 reset->rcdev.owner = THIS_MODULE;
332 reset->rcdev.of_node = pdev->dev.of_node;
333 reset->rcdev.nr_resets = reset->data->n_device_reset;
334 reset->rcdev.of_reset_n_cells = 1;
335 reset->rcdev.of_xlate = at91_reset_of_xlate;
337 return devm_reset_controller_register(&pdev->dev, &reset->rcdev);
343 struct at91_reset *reset;
347 reset = devm_kzalloc(&pdev->dev, sizeof(*reset), GFP_KERNEL);
348 if (!reset)
351 reset->rstc_base = devm_of_iomap(&pdev->dev, pdev->dev.of_node, 0, NULL);
352 if (IS_ERR(reset->rstc_base)) {
353 dev_err(&pdev->dev, "Could not map reset controller address\n");
360 reset->ramc_lpr = (u32)match->data;
361 reset->ramc_base[idx] = devm_of_iomap(&pdev->dev, np, 0, NULL);
362 if (IS_ERR(reset->ramc_base[idx])) {
371 reset->data = device_get_match_data(&pdev->dev);
372 if (!reset->data)
375 reset->nb.notifier_call = at91_reset;
376 reset->nb.priority = 192;
378 reset->sclk = devm_clk_get(&pdev->dev, NULL);
379 if (IS_ERR(reset->sclk))
380 return PTR_ERR(reset->sclk);
382 ret = clk_prepare_enable(reset->sclk);
388 platform_set_drvdata(pdev, reset);
390 ret = at91_rcdev_init(reset, pdev);
395 u32 val = readl(reset->rstc_base + AT91_RSTC_MR);
398 reset->rstc_base + AT91_RSTC_MR);
401 ret = register_restart_handler(&reset->nb);
411 dev_info(&pdev->dev, "Starting after %s\n", at91_reset_reason(reset));
416 clk_disable_unprepare(reset->sclk);
422 struct at91_reset *reset = platform_get_drvdata(pdev);
424 unregister_restart_handler(&reset->nb);
425 clk_disable_unprepare(reset->sclk);
433 .name = "at91-reset",