Lines Matching refs:pmu
16 #include <dt-bindings/power/starfive,jh7110-pmu.h>
34 /* pmu int status */
66 spinlock_t lock; /* protects pmu reg */
71 struct jh71xx_pmu *pmu;
77 struct jh71xx_pmu *pmu = pmd->pmu;
82 *is_on = readl(pmu->base + JH71XX_PMU_CURR_POWER_MODE) & mask;
89 struct jh71xx_pmu *pmu = pmd->pmu;
100 dev_dbg(pmu->dev, "unable to get current state for %s\n",
106 dev_dbg(pmu->dev, "pm domain [%s] is already %sable status.\n",
111 spin_lock_irqsave(&pmu->lock, flags);
133 writel(mask, pmu->base + mode);
143 writel(JH71XX_PMU_SW_ENCOURAGE_ON, pmu->base + JH71XX_PMU_SW_ENCOURAGE);
144 writel(encourage_lo, pmu->base + JH71XX_PMU_SW_ENCOURAGE);
145 writel(encourage_hi, pmu->base + JH71XX_PMU_SW_ENCOURAGE);
147 spin_unlock_irqrestore(&pmu->lock, flags);
151 ret = readl_poll_timeout_atomic(pmu->base + JH71XX_PMU_CURR_POWER_MODE,
155 ret = readl_poll_timeout_atomic(pmu->base + JH71XX_PMU_CURR_POWER_MODE,
161 dev_err(pmu->dev, "%s: failed to power %s\n",
187 static void jh71xx_pmu_int_enable(struct jh71xx_pmu *pmu, u32 mask, bool enable)
192 spin_lock_irqsave(&pmu->lock, flags);
193 val = readl(pmu->base + JH71XX_PMU_TIMER_INT_MASK);
200 writel(val, pmu->base + JH71XX_PMU_TIMER_INT_MASK);
201 spin_unlock_irqrestore(&pmu->lock, flags);
206 struct jh71xx_pmu *pmu = data;
209 val = readl(pmu->base + JH71XX_PMU_INT_STATUS);
212 dev_dbg(pmu->dev, "sequence done.\n");
214 dev_dbg(pmu->dev, "hardware encourage requestion.\n");
216 dev_err(pmu->dev, "software encourage fail.\n");
218 dev_err(pmu->dev, "hardware encourage fail.\n");
220 dev_err(pmu->dev, "p-channel fail event.\n");
223 writel(val, pmu->base + JH71XX_PMU_INT_STATUS);
224 writel(val, pmu->base + JH71XX_PMU_EVENT_STATUS);
229 static int jh71xx_pmu_init_domain(struct jh71xx_pmu *pmu, int index)
236 pmd = devm_kzalloc(pmu->dev, sizeof(*pmd), GFP_KERNEL);
240 pmd->domain_info = &pmu->match_data->domain_info[index];
241 pmd->pmu = pmu;
249 dev_warn(pmu->dev, "unable to get current state for %s\n",
256 pmu->genpd_data.domains[index] = &pmd->genpd;
266 struct jh71xx_pmu *pmu;
270 pmu = devm_kzalloc(dev, sizeof(*pmu), GFP_KERNEL);
271 if (!pmu)
274 pmu->base = devm_platform_ioremap_resource(pdev, 0);
275 if (IS_ERR(pmu->base))
276 return PTR_ERR(pmu->base);
278 pmu->irq = platform_get_irq(pdev, 0);
279 if (pmu->irq < 0)
280 return pmu->irq;
282 ret = devm_request_irq(dev, pmu->irq, jh71xx_pmu_interrupt,
283 0, pdev->name, pmu);
291 pmu->genpd = devm_kcalloc(dev, match_data->num_domains,
294 if (!pmu->genpd)
297 pmu->dev = dev;
298 pmu->match_data = match_data;
299 pmu->genpd_data.domains = pmu->genpd;
300 pmu->genpd_data.num_domains = match_data->num_domains;
303 ret = jh71xx_pmu_init_domain(pmu, i);
310 spin_lock_init(&pmu->lock);
311 jh71xx_pmu_int_enable(pmu, JH71XX_PMU_INT_ALL_MASK & ~JH71XX_PMU_INT_PCH_FAIL, true);
313 ret = of_genpd_add_provider_onecell(np, &pmu->genpd_data);
364 .compatible = "starfive,jh7110-pmu",
374 .name = "jh71xx-pmu",