Lines Matching refs:domain

318 	struct imx_pgc_domain *domain = to_imx_pgc_domain(genpd);
322 ret = pm_runtime_get_sync(domain->dev);
324 pm_runtime_put_noidle(domain->dev);
328 if (!IS_ERR(domain->regulator)) {
329 ret = regulator_enable(domain->regulator);
331 dev_err(domain->dev,
338 reset_control_assert(domain->reset);
340 /* Enable reset clocks for all devices in the domain */
341 ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
343 dev_err(domain->dev, "failed to enable reset clocks\n");
350 if (domain->bits.pxx) {
351 /* request the domain to power up */
352 regmap_update_bits(domain->regmap, domain->regs->pup,
353 domain->bits.pxx, domain->bits.pxx);
358 ret = regmap_read_poll_timeout(domain->regmap,
359 domain->regs->pup, reg_val,
360 !(reg_val & domain->bits.pxx),
363 dev_err(domain->dev, "failed to command PGC\n");
368 for_each_set_bit(pgc, &domain->pgc, 32) {
369 regmap_clear_bits(domain->regmap, GPC_PGC_CTRL(pgc),
377 reset_control_deassert(domain->reset);
380 if (domain->bits.hskreq) {
381 regmap_update_bits(domain->regmap, domain->regs->hsk,
382 domain->bits.hskreq, domain->bits.hskreq);
385 * ret = regmap_read_poll_timeout(domain->regmap, domain->regs->hsk, reg_val,
386 * (reg_val & domain->bits.hskack), 0,
398 /* Disable reset clocks for all devices in the domain */
399 if (!domain->keep_clocks)
400 clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
405 clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
407 if (!IS_ERR(domain->regulator))
408 regulator_disable(domain->regulator);
410 pm_runtime_put(domain->dev);
417 struct imx_pgc_domain *domain = to_imx_pgc_domain(genpd);
421 /* Enable reset clocks for all devices in the domain */
422 if (!domain->keep_clocks) {
423 ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
425 dev_err(domain->dev, "failed to enable reset clocks\n");
431 if (domain->bits.hskreq) {
432 regmap_clear_bits(domain->regmap, domain->regs->hsk,
433 domain->bits.hskreq);
435 ret = regmap_read_poll_timeout(domain->regmap, domain->regs->hsk,
437 !(reg_val & domain->bits.hskack),
440 dev_err(domain->dev, "failed to power down ADB400\n");
445 if (domain->bits.pxx) {
447 for_each_set_bit(pgc, &domain->pgc, 32) {
448 regmap_update_bits(domain->regmap, GPC_PGC_CTRL(pgc),
452 /* request the domain to power down */
453 regmap_update_bits(domain->regmap, domain->regs->pdn,
454 domain->bits.pxx, domain->bits.pxx);
459 ret = regmap_read_poll_timeout(domain->regmap,
460 domain->regs->pdn, reg_val,
461 !(reg_val & domain->bits.pxx),
464 dev_err(domain->dev, "failed to command PGC\n");
469 /* Disable reset clocks for all devices in the domain */
470 clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
472 if (!IS_ERR(domain->regulator)) {
473 ret = regulator_disable(domain->regulator);
475 dev_err(domain->dev,
482 pm_runtime_put_sync_suspend(domain->dev);
487 if (!domain->keep_clocks)
488 clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
1315 struct imx_pgc_domain *domain = pdev->dev.platform_data;
1318 domain->dev = &pdev->dev;
1320 domain->regulator = devm_regulator_get_optional(domain->dev, "power");
1321 if (IS_ERR(domain->regulator)) {
1322 if (PTR_ERR(domain->regulator) != -ENODEV)
1323 return dev_err_probe(domain->dev, PTR_ERR(domain->regulator),
1324 "Failed to get domain's regulator\n");
1325 } else if (domain->voltage) {
1326 regulator_set_voltage(domain->regulator,
1327 domain->voltage, domain->voltage);
1330 domain->num_clks = devm_clk_bulk_get_all(domain->dev, &domain->clks);
1331 if (domain->num_clks < 0)
1332 return dev_err_probe(domain->dev, domain->num_clks,
1333 "Failed to get domain's clocks\n");
1335 domain->reset = devm_reset_control_array_get_optional_exclusive(domain->dev);
1336 if (IS_ERR(domain->reset))
1337 return dev_err_probe(domain->dev, PTR_ERR(domain->reset),
1338 "Failed to get domain's resets\n");
1340 pm_runtime_enable(domain->dev);
1342 if (domain->bits.map)
1343 regmap_update_bits(domain->regmap, domain->regs->map,
1344 domain->bits.map, domain->bits.map);
1346 ret = pm_genpd_init(&domain->genpd, NULL, true);
1348 dev_err(domain->dev, "Failed to init power domain\n");
1353 of_property_read_bool(domain->dev->of_node, "power-domains"))
1354 lockdep_set_subclass(&domain->genpd.mlock, 1);
1356 ret = of_genpd_add_provider_simple(domain->dev->of_node,
1357 &domain->genpd);
1359 dev_err(domain->dev, "Failed to add genpd provider\n");
1366 pm_genpd_remove(&domain->genpd);
1368 if (domain->bits.map)
1369 regmap_update_bits(domain->regmap, domain->regs->map,
1370 domain->bits.map, 0);
1371 pm_runtime_disable(domain->dev);
1378 struct imx_pgc_domain *domain = pdev->dev.platform_data;
1380 of_genpd_del_provider(domain->dev->of_node);
1381 pm_genpd_remove(&domain->genpd);
1383 if (domain->bits.map)
1384 regmap_update_bits(domain->regmap, domain->regs->map,
1385 domain->bits.map, 0);
1387 pm_runtime_disable(domain->dev);
1399 * can power down our domain and more importantly power it up again
1423 { "imx-pgc-domain", },
1476 struct imx_pgc_domain *domain;
1496 pd_pdev = platform_device_alloc("imx-pgc-domain",
1513 domain = pd_pdev->dev.platform_data;
1514 domain->regmap = regmap;
1515 domain->regs = domain_data->pgc_regs;
1517 domain->genpd.power_on = imx_pgc_power_up;
1518 domain->genpd.power_off = imx_pgc_power_down;