Lines Matching defs:pwrc_domain
73 bool (*is_powered_off)(struct meson_ee_pwrc_domain *pwrc_domain);
257 static bool pwrc_ee_is_powered_off(struct meson_ee_pwrc_domain *pwrc_domain);
333 static bool pwrc_ee_is_powered_off(struct meson_ee_pwrc_domain *pwrc_domain)
337 regmap_read(pwrc_domain->pwrc->regmap_ao,
338 pwrc_domain->desc.top_pd->sleep_reg, ®);
340 return (reg & pwrc_domain->desc.top_pd->sleep_mask);
345 struct meson_ee_pwrc_domain *pwrc_domain =
349 if (pwrc_domain->desc.top_pd)
350 regmap_update_bits(pwrc_domain->pwrc->regmap_ao,
351 pwrc_domain->desc.top_pd->sleep_reg,
352 pwrc_domain->desc.top_pd->sleep_mask,
353 pwrc_domain->desc.top_pd->sleep_mask);
356 for (i = 0 ; i < pwrc_domain->desc.mem_pd_count ; ++i)
357 regmap_update_bits(pwrc_domain->pwrc->regmap_hhi,
358 pwrc_domain->desc.mem_pd[i].reg,
359 pwrc_domain->desc.mem_pd[i].mask,
360 pwrc_domain->desc.mem_pd[i].mask);
364 if (pwrc_domain->desc.top_pd)
365 regmap_update_bits(pwrc_domain->pwrc->regmap_ao,
366 pwrc_domain->desc.top_pd->iso_reg,
367 pwrc_domain->desc.top_pd->iso_mask,
368 pwrc_domain->desc.top_pd->iso_mask);
370 if (pwrc_domain->num_clks) {
372 clk_bulk_disable_unprepare(pwrc_domain->num_clks,
373 pwrc_domain->clks);
381 struct meson_ee_pwrc_domain *pwrc_domain =
385 if (pwrc_domain->desc.top_pd)
386 regmap_update_bits(pwrc_domain->pwrc->regmap_ao,
387 pwrc_domain->desc.top_pd->sleep_reg,
388 pwrc_domain->desc.top_pd->sleep_mask, 0);
391 for (i = 0 ; i < pwrc_domain->desc.mem_pd_count ; ++i)
392 regmap_update_bits(pwrc_domain->pwrc->regmap_hhi,
393 pwrc_domain->desc.mem_pd[i].reg,
394 pwrc_domain->desc.mem_pd[i].mask, 0);
398 ret = reset_control_assert(pwrc_domain->rstc);
402 if (pwrc_domain->desc.top_pd)
403 regmap_update_bits(pwrc_domain->pwrc->regmap_ao,
404 pwrc_domain->desc.top_pd->iso_reg,
405 pwrc_domain->desc.top_pd->iso_mask, 0);
407 ret = reset_control_deassert(pwrc_domain->rstc);
411 return clk_bulk_prepare_enable(pwrc_domain->num_clks,
412 pwrc_domain->clks);