Lines Matching defs:ctl
162 * @ctl: control register offset (TMFIFO_RX_CTL / TMFIFO_TX_CTL)
167 void __iomem *ctl;
1293 u64 ctl;
1296 ctl = readq(fifo->tx.ctl);
1298 FIELD_GET(MLXBF_TMFIFO_TX_CTL__MAX_ENTRIES_MASK, ctl);
1299 ctl = (ctl & ~MLXBF_TMFIFO_TX_CTL__LWM_MASK) |
1302 ctl = (ctl & ~MLXBF_TMFIFO_TX_CTL__HWM_MASK) |
1305 writeq(ctl, fifo->tx.ctl);
1308 ctl = readq(fifo->rx.ctl);
1310 FIELD_GET(MLXBF_TMFIFO_RX_CTL__MAX_ENTRIES_MASK, ctl);
1311 ctl = (ctl & ~MLXBF_TMFIFO_RX_CTL__LWM_MASK) |
1313 ctl = (ctl & ~MLXBF_TMFIFO_RX_CTL__HWM_MASK) |
1315 writeq(ctl, fifo->rx.ctl);
1365 fifo->rx.ctl = fifo->res1 + MLXBF_TMFIFO_RX_CTL_BF3;
1368 fifo->tx.ctl = fifo->res1 + MLXBF_TMFIFO_TX_CTL_BF3;
1372 fifo->rx.ctl = fifo->res0 + MLXBF_TMFIFO_RX_CTL;
1375 fifo->tx.ctl = fifo->res1 + MLXBF_TMFIFO_TX_CTL;