Lines Matching refs:val

43 static inline void sppctl_first_writel(struct sppctl_gpio_chip *spp_gchip, u32 val, u32 off)
45 	writel(val, spp_gchip->first_base + SPPCTL_GPIO_OFF_FIRST + off);
53 static inline void sppctl_gpio_master_writel(struct sppctl_gpio_chip *spp_gchip, u32 val,
56 	writel(val, spp_gchip->gpioxt_base + SPPCTL_GPIO_OFF_MASTER + off);
64 static inline void sppctl_gpio_oe_writel(struct sppctl_gpio_chip *spp_gchip, u32 val, u32 off)
66 	writel(val, spp_gchip->gpioxt_base + SPPCTL_GPIO_OFF_OE + off);
69 static inline void sppctl_gpio_out_writel(struct sppctl_gpio_chip *spp_gchip, u32 val, u32 off)
71 	writel(val, spp_gchip->gpioxt_base + SPPCTL_GPIO_OFF_OUT + off);
84 static inline void sppctl_gpio_iinv_writel(struct sppctl_gpio_chip *spp_gchip, u32 val,
87 	writel(val, spp_gchip->gpioxt_base + SPPCTL_GPIO_OFF_IINV + off);
95 static inline void sppctl_gpio_oinv_writel(struct sppctl_gpio_chip *spp_gchip, u32 val,
98 	writel(val, spp_gchip->gpioxt_base + SPPCTL_GPIO_OFF_OINV + off);
106 static inline void sppctl_gpio_od_writel(struct sppctl_gpio_chip *spp_gchip, u32 val, u32 off)
108 	writel(val, spp_gchip->gpioxt_base + SPPCTL_GPIO_OFF_OD + off);
138 static inline u32 sppctl_prep_moon_reg_and_offset(unsigned int offset, u32 *reg_off, int val)
143 	if (val)
174 static void sppctl_func_set(struct sppctl_pdata *pctl, u8 func, u8 val)
183 	reg = SPPCTL_FULLY_PINMUX_MASK_MASK | val;
227 			   u8 val)
237 	reg = (mask | val) << bit_off;
310 	enum mux_first_reg val;
316 		val = (reg & BIT(bit_off)) ? mux_f_gpio : mux_f_mux;
318 		if (first != val)
372 				      unsigned int val)
377 	reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, val);
428 static int sppctl_gpio_direction_output(struct gpio_chip *chip, unsigned int offset, int val)
440 	if (val < 0) {
445 	reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, val);
463 static void sppctl_gpio_set(struct gpio_chip *chip, unsigned int offset, int val)
468 	reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, val);