Lines Matching refs:reg_off
111 static inline u32 sppctl_get_reg_and_bit_offset(unsigned int offset, u32 *reg_off)
116 *reg_off = (offset / 32) * 4;
122 static inline u32 sppctl_get_moon_reg_and_bit_offset(unsigned int offset, u32 *reg_off)
132 *reg_off = (offset / 16) * 4;
138 static inline u32 sppctl_prep_moon_reg_and_offset(unsigned int offset, u32 *reg_off, int val)
142 bit_off = sppctl_get_moon_reg_and_bit_offset(offset, reg_off);
226 static void sppctl_gmx_set(struct sppctl_pdata *pctl, u8 reg_off, u8 bit_off, u8 bit_sz,
239 writel(reg, pctl->moon1_base + reg_off * 4);
263 u32 reg_off, bit_off, reg;
265 bit_off = sppctl_get_reg_and_bit_offset(offset, ®_off);
266 reg = sppctl_first_readl(spp_gchip, reg_off);
298 u32 reg_off, bit_off, reg;
300 bit_off = sppctl_get_moon_reg_and_bit_offset(offset, ®_off);
301 reg = sppctl_gpio_master_readl(spp_gchip, reg_off);
309 u32 reg_off, bit_off, reg;
314 bit_off = sppctl_get_reg_and_bit_offset(offset, ®_off);
315 reg = sppctl_first_readl(spp_gchip, reg_off);
322 sppctl_first_writel(spp_gchip, reg, reg_off);
327 sppctl_first_writel(spp_gchip, reg, reg_off);
337 reg = sppctl_prep_moon_reg_and_offset(offset, ®_off, (master == mux_m_gpio));
338 sppctl_gpio_master_writel(spp_gchip, reg, reg_off);
345 u32 reg_off, reg;
347 reg = sppctl_prep_moon_reg_and_offset(offset, ®_off, 1);
348 sppctl_gpio_iinv_writel(spp_gchip, reg, reg_off);
354 u32 reg_off, reg;
356 reg = sppctl_prep_moon_reg_and_offset(offset, ®_off, 1);
357 sppctl_gpio_oinv_writel(spp_gchip, reg, reg_off);
363 u32 reg_off, bit_off, reg;
365 bit_off = sppctl_get_moon_reg_and_bit_offset(offset, ®_off);
366 reg = sppctl_gpio_od_readl(spp_gchip, reg_off);
375 u32 reg_off, reg;
377 reg = sppctl_prep_moon_reg_and_offset(offset, ®_off, val);
378 sppctl_gpio_od_writel(spp_gchip, reg, reg_off);
384 u32 reg_off, bit_off, reg;
386 bit_off = sppctl_get_moon_reg_and_bit_offset(offset, ®_off);
387 reg = sppctl_gpio_oe_readl(spp_gchip, reg_off);
395 u32 reg_off, bit_off, reg;
398 bit_off = sppctl_get_moon_reg_and_bit_offset(offset, ®_off);
403 reg = sppctl_gpio_iinv_readl(spp_gchip, reg_off);
405 reg = sppctl_gpio_oinv_readl(spp_gchip, reg_off);
416 u32 reg_off, reg;
418 reg = sppctl_prep_moon_reg_and_offset(offset, ®_off, 0);
422 sppctl_gpio_oe_writel(spp_gchip, reg, reg_off);
432 u32 reg_off, reg;
434 reg = sppctl_prep_moon_reg_and_offset(offset, ®_off, 1);
438 sppctl_gpio_oe_writel(spp_gchip, reg, reg_off);
445 reg = sppctl_prep_moon_reg_and_offset(offset, ®_off, val);
446 sppctl_gpio_out_writel(spp_gchip, reg, reg_off);
455 u32 reg_off, bit_off, reg;
457 bit_off = sppctl_get_reg_and_bit_offset(offset, ®_off);
458 reg = sppctl_gpio_in_readl(spp_gchip, reg_off);
466 u32 reg_off, reg;
468 reg = sppctl_prep_moon_reg_and_offset(offset, ®_off, val);
469 sppctl_gpio_out_writel(spp_gchip, reg, reg_off);
477 u32 reg_off, reg;
481 reg = sppctl_prep_moon_reg_and_offset(offset, ®_off, 1);
482 sppctl_gpio_od_writel(spp_gchip, reg, reg_off);