Lines Matching defs:sfp
290 static void jh7110_set_function(struct jh7110_pinctrl *sfp,
304 reg = sfp->base + fs->offset;
308 raw_spin_lock_irqsave(&sfp->lock, flags);
311 raw_spin_unlock_irqrestore(&sfp->lock, flags);
314 static void jh7110_set_vin_group(struct jh7110_pinctrl *sfp,
326 reg = sfp->base + gs->offset;
330 raw_spin_lock_irqsave(&sfp->lock, flags);
333 raw_spin_unlock_irqrestore(&sfp->lock, flags);
336 static int jh7110_sys_set_one_pin_mux(struct jh7110_pinctrl *sfp,
341 if (pin < sfp->gc.ngpio && func == 0)
342 jh7110_set_gpiomux(sfp, pin, din, dout, doen);
344 jh7110_set_function(sfp, pin, func);
346 if (pin < sfp->gc.ngpio && func == 2)
347 jh7110_set_vin_group(sfp, pin);
352 static int jh7110_sys_get_padcfg_base(struct jh7110_pinctrl *sfp,
365 struct jh7110_pinctrl *sfp = jh7110_from_irq_desc(desc);
372 mis = readl_relaxed(sfp->base + JH7110_SYS_GPIOMIS0);
374 generic_handle_domain_irq(sfp->gc.irq.domain, pin);
376 mis = readl_relaxed(sfp->base + JH7110_SYS_GPIOMIS1);
378 generic_handle_domain_irq(sfp->gc.irq.domain, pin + 32);
385 struct jh7110_pinctrl *sfp = container_of(gc,
389 writel(0U, sfp->base + JH7110_SYS_GPIOIE0);
390 writel(0U, sfp->base + JH7110_SYS_GPIOIE1);
392 writel(~0U, sfp->base + JH7110_SYS_GPIOIC0);
393 writel(~0U, sfp->base + JH7110_SYS_GPIOIC1);
395 writel(1U, sfp->base + JH7110_SYS_GPIOEN);