Lines Matching refs:base
147 void __iomem *base;
172 reg = readw(pctrl->base + PM(port));
174 writew(reg, pctrl->base + PM(port));
177 reg = readb(pctrl->base + PMC(port));
178 writeb(reg & ~BIT(pin), pctrl->base + PMC(port));
181 writel(0x0, pctrl->base + PWPR); /* B0WI=0, PFCWE=0 */
182 writel(PWPR_PFCWE, pctrl->base + PWPR); /* B0WI=0, PFCWE=1 */
185 reg = readl(pctrl->base + PFC(port));
187 writel(reg | (func << (pin * 4)), pctrl->base + PFC(port));
190 writel(0x0, pctrl->base + PWPR); /* B0WI=0, PFCWE=0 */
191 writel(PWPR_B0WI, pctrl->base + PWPR); /* B0WI=1, PFCWE=0 */
194 reg = readb(pctrl->base + PMC(port));
195 writeb(reg | BIT(pin), pctrl->base + PMC(port));
487 void __iomem *addr = pctrl->base + offset;
501 void __iomem *addr = pctrl->base + offset;
570 addr = pctrl->base + pwr_reg;
669 addr = pctrl->base + pwr_reg;
804 ret = pinctrl_gpio_request(chip->base + offset);
811 reg8 = readb(pctrl->base + PMC(port));
813 writeb(reg8, pctrl->base + PMC(port));
828 reg16 = readw(pctrl->base + PM(port));
832 writew(reg16, pctrl->base + PM(port));
843 if (!(readb(pctrl->base + PMC(port)) & BIT(bit))) {
846 reg16 = readw(pctrl->base + PM(port));
878 reg8 = readb(pctrl->base + P(port));
881 writeb(reg8 | BIT(bit), pctrl->base + P(port));
883 writeb(reg8 & ~BIT(bit), pctrl->base + P(port));
908 reg16 = readw(pctrl->base + PM(port));
912 return !!(readb(pctrl->base + PIN(port)) & BIT(bit));
914 return !!(readb(pctrl->base + P(port)) & BIT(bit));
923 pinctrl_gpio_free(chip->base + offset);
1183 addr = pctrl->base + ISEL(port);
1211 addr = pctrl->base + ISEL(port);
1387 chip->base = -1;
1401 pctrl->gpio_range.base = 0;
1504 pctrl->base = devm_platform_ioremap_resource(pdev, 0);
1505 if (IS_ERR(pctrl->base))
1506 return PTR_ERR(pctrl->base);