Lines Matching defs:F3
233 #define F3(a) a##_MARK
240 F1(LCDD0), F3(PDM2_CLK_0), F7(DU0_DR0), IRQ(0), /* Port0 */
241 F1(LCDD1), F3(PDM2_DATA_1), F7(DU0_DR19), IRQ(1),
242 F1(LCDD2), F3(PDM3_CLK_2), F7(DU0_DR2), IRQ(2),
243 F1(LCDD3), F3(PDM3_DATA_3), F7(DU0_DR3), IRQ(3),
244 F1(LCDD4), F3(PDM4_CLK_4), F7(DU0_DR4), IRQ(4),
245 F1(LCDD5), F3(PDM4_DATA_5), F7(DU0_DR5), IRQ(5),
246 F1(LCDD6), F3(PDM0_OUTCLK_6), F7(DU0_DR6), IRQ(6),
247 F1(LCDD7), F3(PDM0_OUTDATA_7), F7(DU0_DR7), IRQ(7),
248 F1(LCDD8), F3(PDM1_OUTCLK_8), F7(DU0_DG0), IRQ(8),
249 F1(LCDD9), F3(PDM1_OUTDATA_9), F7(DU0_DG1), IRQ(9),
250 F1(LCDD10), F3(FSICCK), F7(DU0_DG2), IRQ(10), /* Port10 */
251 F1(LCDD11), F3(FSICISLD), F7(DU0_DG3), IRQ(11),
252 F1(LCDD12), F3(FSICOMC), F7(DU0_DG4), IRQ(12),
253 F1(LCDD13), F3(FSICOLR), F4(FSICILR), F7(DU0_DG5), IRQ(13),
254 F1(LCDD14), F3(FSICOBT), F4(FSICIBT), F7(DU0_DG6), IRQ(14),
255 F1(LCDD15), F3(FSICOSLD), F7(DU0_DG7), IRQ(15),
259 F1(LCDD19), F3(SCIFB3_RTS_19), F7(DU0_DB3),
260 F1(LCDD20), F3(SCIFB3_CTS_20), F7(DU0_DB4), /* Port20 */
261 F1(LCDD21), F3(SCIFB3_TXD_21), F7(DU0_DB5),
262 F1(LCDD22), F3(SCIFB3_RXD_22), F7(DU0_DB6),
263 F1(LCDD23), F3(SCIFB3_SCK_23), F7(DU0_DB7),
264 F1(LCDHSYN), F2(LCDCS), F3(SCIFB1_RTS_24),
266 F1(LCDVSYN), F3(SCIFB1_CTS_25), F7(DU0_EXVSYNC_N_VSYNC_N_CSYNC_N),
267 F1(LCDDCK), F2(LCDWR), F3(SCIFB1_TXD_26), F7(DU0_DOTCLKIN),
268 F1(LCDDISP), F2(LCDRS), F3(SCIFB1_RXD_27), F7(DU0_DOTCLKOUT),
269 F1(LCDRD_N), F3(SCIFB1_SCK_28), F7(DU0_DOTCLKOUTB),
279 F1(SCIFB0_RTS), F3(TPU0TO1), F4(SCIFB3_RTS_38), F7(CHSCIF0_HRTS),
280 F1(SCIFB0_CTS), F3(TPU0TO2), F4(SCIFB3_CTS_39), F7(CHSCIF0_HCTS),
281 F1(SCIFB0_SCK), F3(TPU0TO3), F4(SCIFB3_SCK_40),
286 F1(HSI_RX_WAKE), F2(SCIFB2_CTS_66), F3(MSIOF3_SYNC), F5(GenIO4),
289 F1(HSI_RX_FLAG), F2(SCIFB2_TXD_68), F3(MSIOF3_TXD), F5(GIO_OUT4_68),
290 F1(HSI_RX_DATA), F2(SCIFB2_RXD_69), F3(MSIOF3_RXD), F5(GIO_OUT5_69),
296 F1(HSI_TX_READY), F2(SCIFB2_RTS_73), F3(MSIOF3_SCK), F5(GIO_OUT0_73),
313 F3(SF_PORT_1_120), F4(SCIFB3_RXD_120), F7(DU0_CDE), /* Port120 */
314 F3(SF_PORT_0_121), F4(SCIFB3_TXD_121),
316 F1(SCIFB0_RXD), F7(CHSCIF0_HRX), F3(ISP_STROBE_124),
317 F1(STP_ISD_0), F2(PDM4_CLK_125), F3(MSIOF2_TXD), F5(SIM0_VOLTSEL0),
318 F1(TS_SDEN), F2(MSIOF7_SYNC), F3(STP_ISEN_1),
319 F1(STP_ISEN_0), F2(PDM1_OUTDATA_128), F3(MSIOF2_SYNC),
320 F5(SIM1_VOLTSEL1), F1(TS_SPSYNC), F2(MSIOF7_RXD), F3(STP_ISSYNC_1),
321 F1(STP_ISSYNC_0), F2(PDM4_DATA_130), F3(MSIOF2_RXD),
324 F3(STP_ISCLK_1), F1(STP_ISCLK_0), F2(PDM1_OUTCLK_133), F3(MSIOF2_SCK),
325 F5(SIM1_VOLTSEL0), F1(TS_SDAT), F2(MSIOF7_TXD), F3(STP_ISD_1),
371 F1(FSIACK), F2(PDM3_CLK_234), F3(ISP_IRIS1_234),
373 F1(FSIAOMC), F2(PDM0_OUTCLK_236), F3(ISP_IRIS0_236),
377 F1(FSIBOLR), F2(FSIBILR), F1(FSIBOMC), F3(ISP_SHUTTER1_242),
379 F1(FSIBCK), F3(ISP_SHUTTER0_245),
383 F3(VIO_CKO3_259), F1(MSIOF0_TXD), /* Port260 */
389 F1(MSIOF2_SS1), F3(VIO_CKO5_270), /* Port270 */
390 F1(MSIOF2_SS2), F3(VIO_CKO2_271), F1(MSIOF3_SS2), F3(VIO_CKO1_272),
391 F1(MSIOF3_SS1), F3(VIO_CKO4_273), F1(MSIOF4_SS2), F4(TPU1TO0),
395 F1(SIM1_RST), F1(SDHID1_0), F3(STMDATA0_2),
396 F1(SDHID1_1), F3(STMDATA1_2), IRQ(51), /* Port290 */
397 F1(SDHID1_2), F3(STMDATA2_2), F1(SDHID1_3), F3(STMDATA3_2),
398 F1(SDHICLK1), F3(STMCLK_2), F1(SDHICMD1), F3(STMSIDI_2),
399 F1(SDHID2_0), F2(MSIOF4_TXD), F3(SCIFB2_TXD_295), F4(MSIOF6_TXD),
401 F1(SDHID2_2), F2(MSIOF4_RXD), F3(SCIFB2_RXD_297), F4(MSIOF6_RXD),
402 F1(SDHID2_3), F2(MSIOF4_SYNC), F3(SCIFB2_CTS_298), F4(MSIOF6_SYNC),
403 F1(SDHICLK2), F2(MSIOF4_SCK), F3(SCIFB2_SCK_299), F4(MSIOF6_SCK),
404 F1(SDHICMD2), F2(MSIOF4_SS1), F3(SCIFB2_RTS_300),
406 F1(SDHICD0), IRQ(50), F1(SDHID0_0), F3(STMDATA0_1),
407 F1(SDHID0_1), F3(STMDATA1_1), F1(SDHID0_2), F3(STMDATA2_1),
408 F1(SDHID0_3), F3(STMDATA3_1), F1(SDHICMD0), F3(STMSIDI_1),
409 F1(SDHIWP0), F1(SDHICLK0), F3(STMCLK_1), IRQ(16), /* Port320 */