Lines Matching refs:pfc
29 struct sh_pfc *pfc;
40 return chip->pfc;
47 int idx = sh_pfc_get_pin_index(chip->pfc, offset);
74 struct sh_pfc *pfc = chip->pfc;
76 const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
81 for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) {
96 struct sh_pfc *pfc = chip->pfc;
103 for (i = 0; pfc->info->data_regs[i].reg_width; ++i)
106 chip->regs = devm_kcalloc(pfc->dev, i, sizeof(*chip->regs),
111 for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) {
116 for (i = 0; i < pfc->info->nr_pins; i++) {
117 if (pfc->info->pins[i].enum_id == 0)
132 struct sh_pfc *pfc = gpio_to_pfc(gc);
133 int idx = sh_pfc_get_pin_index(pfc, offset);
135 if (idx < 0 || pfc->info->pins[idx].enum_id == 0)
199 struct sh_pfc *pfc = gpio_to_pfc(gc);
202 for (i = 0; i < pfc->info->gpio_irq_size; i++) {
203 const short *gpios = pfc->info->gpio_irq[i].gpios;
207 return pfc->irqs[i];
216 struct sh_pfc *pfc = chip->pfc;
220 chip->pins = devm_kcalloc(pfc->dev,
221 pfc->info->nr_pins, sizeof(*chip->pins),
238 gc->label = pfc->info->name;
239 gc->parent = pfc->dev;
242 gc->ngpio = pfc->nr_gpio_pins;
254 struct sh_pfc *pfc = gpio_to_pfc(gc);
255 unsigned int mark = pfc->info->func_gpios[offset].enum_id;
259 dev_notice_once(pfc->dev,
265 spin_lock_irqsave(&pfc->lock, flags);
266 ret = sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION);
267 spin_unlock_irqrestore(&pfc->lock, flags);
274 struct sh_pfc *pfc = chip->pfc;
279 gc->label = pfc->info->name;
281 gc->base = pfc->nr_gpio_pins;
282 gc->ngpio = pfc->info->nr_func_gpios;
293 sh_pfc_add_gpiochip(struct sh_pfc *pfc, int(*setup)(struct sh_pfc_chip *),
299 chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL);
304 chip->pfc = pfc;
310 ret = devm_gpiochip_add_data(pfc->dev, &chip->gpio_chip, chip);
314 dev_info(pfc->dev, "%s handling gpio %u -> %u\n",
321 int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
327 if (pfc->info->data_regs == NULL)
335 address = pfc->info->data_regs[0].reg;
336 for (i = 0; i < pfc->num_windows; ++i) {
337 struct sh_pfc_window *window = &pfc->windows[i];
344 if (i == pfc->num_windows)
348 if (pfc->num_irqs != pfc->info->gpio_irq_size) {
349 dev_err(pfc->dev, "invalid number of IRQ resources\n");
354 chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup, &pfc->windows[i]);
358 pfc->gpio = chip;
360 if (IS_ENABLED(CONFIG_OF) && pfc->dev->of_node)
370 for (i = 0; i < pfc->nr_ranges; ++i) {
371 const struct sh_pfc_pin_range *range = &pfc->ranges[i];
374 if (range->start >= pfc->nr_gpio_pins)
378 dev_name(pfc->dev), range->start, range->start,
385 if (pfc->info->nr_func_gpios) {
386 chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup, NULL);