Lines Matching refs:pins
61 #define PIN_BANK(id, pins, label) \
64 .nr_pins = pins, \
74 #define PIN_BANK_IOMUX_FLAGS(id, pins, label, iom0, iom1, iom2, iom3) \
77 .nr_pins = pins, \
87 #define PIN_BANK_DRV_FLAGS(id, pins, label, type0, type1, type2, type3) \
90 .nr_pins = pins, \
106 #define PIN_BANK_IOMUX_FLAGS_PULL_FLAGS(id, pins, label, iom0, iom1, \
111 .nr_pins = pins, \
125 #define PIN_BANK_DRV_FLAGS_PULL_FLAGS(id, pins, label, drv0, drv1, \
130 .nr_pins = pins, \
150 #define PIN_BANK_IOMUX_FLAGS_OFFSET(id, pins, label, iom0, iom1, iom2, \
155 .nr_pins = pins, \
165 #define PIN_BANK_IOMUX_DRV_FLAGS_OFFSET(id, pins, label, iom0, iom1, \
171 .nr_pins = pins, \
187 #define PIN_BANK_IOMUX_FLAGS_DRV_FLAGS_OFFSET_PULL_FLAGS(id, pins, \
195 .nr_pins = pins, \
307 unsigned selector, const unsigned **pins,
315 *pins = info->groups[selector].pins;
335 * config maps for pins
368 pin_get_name(pctldev, grp->pins[i]);
839 RK_MUXROUTE_SAME(0, RK_PD0, 1, 0xa0, BIT(16 + 11)), /* non-iomuxed emmc/flash pins on flash-dqs */
840 RK_MUXROUTE_SAME(0, RK_PD0, 2, 0xa0, BIT(16 + 11) | BIT(11)), /* non-iomuxed emmc/flash pins on emmc-clk */
1286 /* The first 32 pins of the first bank are located in PMU */
1318 /* The first 32 pins of the first bank are located in PMU */
1381 /* The first 24 pins of the first bank are located in PMU */
1412 /* The first 24 pins of the first bank are located in PMU */
1475 /* The first 24 pins of the first bank are located in PMU */
1512 /* The first 24 pins of the first bank are located in PMU */
1645 /* The first 12 pins of the first bank are located elsewhere */
1682 /* The first 24 pins of the first bank are located in PMU */
1718 /* The first 24 pins of the first bank are located in PMU */
1827 /* The first 32 pins of the first bank are located in PMU */
1860 /* The first 32 pins of the first bank are located in PMU */
1894 /* The bank0:16 and bank1:32 pins are located in PMU */
1927 /* The bank0:16 and bank1:32 pins are located in PMU */
1988 /* The first 32 pins of the first bank are located in PMU */
2684 const unsigned int *pins = info->groups[group].pins;
2698 bank = pin_to_bank(info, pins[cnt]);
2699 ret = rockchip_set_mux(bank, pins[cnt] - bank->pin_base,
2708 rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0);
3012 * the binding format is rockchip,pins = <bank pin mux CONFIG>,
3013 * do sanity check and calculate pins number
3015 list = of_get_property(np, "rockchip,pins", &size);
3019 return dev_err_probe(dev, -EINVAL, "wrong pins number or pins and configs should be by 4\n");
3023 grp->pins = devm_kcalloc(dev, grp->npins, sizeof(*grp->pins), GFP_KERNEL);
3025 if (!grp->pins || !grp->data)
3037 grp->pins[j] = bank->pin_base + be32_to_cpu(*list++);
3154 ctrldesc->pins = pindesc;