Lines Matching refs:mcp
138 static int mcp_read(struct mcp23s08 *mcp, unsigned int reg, unsigned int *val)
140 return regmap_read(mcp->regmap, reg << mcp->reg_shift, val);
143 static int mcp_write(struct mcp23s08 *mcp, unsigned int reg, unsigned int val)
145 return regmap_write(mcp->regmap, reg << mcp->reg_shift, val);
148 static int mcp_update_bits(struct mcp23s08 *mcp, unsigned int reg,
151 return regmap_update_bits(mcp->regmap, reg << mcp->reg_shift,
155 static int mcp_set_bit(struct mcp23s08 *mcp, unsigned int reg,
159 return mcp_update_bits(mcp, reg, mask, enabled ? mask : 0);
224 struct mcp23s08 *mcp = pinctrl_dev_get_drvdata(pctldev);
231 ret = mcp_read(mcp, MCP_GPPU, &data);
248 struct mcp23s08 *mcp = pinctrl_dev_get_drvdata(pctldev);
260 ret = mcp_set_bit(mcp, MCP_GPPU, pin, arg);
263 dev_dbg(mcp->dev, "Invalid config param %04x\n", param);
281 struct mcp23s08 *mcp = gpiochip_get_data(chip);
284 mutex_lock(&mcp->lock);
285 status = mcp_set_bit(mcp, MCP_IODIR, offset, true);
286 mutex_unlock(&mcp->lock);
293 struct mcp23s08 *mcp = gpiochip_get_data(chip);
296 mutex_lock(&mcp->lock);
299 ret = mcp_read(mcp, MCP_GPIO, &status);
303 mcp->cached_gpio = status;
307 mutex_unlock(&mcp->lock);
314 struct mcp23s08 *mcp = gpiochip_get_data(chip);
318 mutex_lock(&mcp->lock);
321 ret = mcp_read(mcp, MCP_GPIO, &status);
325 mcp->cached_gpio = status;
329 mutex_unlock(&mcp->lock);
333 static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, bool value)
335 return mcp_update_bits(mcp, MCP_OLAT, mask, value ? mask : 0);
340 struct mcp23s08 *mcp = gpiochip_get_data(chip);
343 mutex_lock(&mcp->lock);
344 __mcp23s08_set(mcp, mask, !!value);
345 mutex_unlock(&mcp->lock);
351 struct mcp23s08 *mcp = gpiochip_get_data(chip);
353 mutex_lock(&mcp->lock);
354 mcp_update_bits(mcp, MCP_OLAT, *mask, *bits);
355 mutex_unlock(&mcp->lock);
361 struct mcp23s08 *mcp = gpiochip_get_data(chip);
365 mutex_lock(&mcp->lock);
366 status = __mcp23s08_set(mcp, mask, value);
368 status = mcp_update_bits(mcp, MCP_IODIR, mask, 0);
370 mutex_unlock(&mcp->lock);
377 struct mcp23s08 *mcp = data;
383 mutex_lock(&mcp->lock);
384 if (mcp_read(mcp, MCP_INTF, &intf))
392 if (mcp_read(mcp, MCP_INTCAP, &intcap))
395 if (mcp_read(mcp, MCP_INTCON, &intcon))
398 if (mcp_read(mcp, MCP_DEFVAL, &defval))
402 if (mcp_read(mcp, MCP_GPIO, &gpio))
405 gpio_orig = mcp->cached_gpio;
406 mcp->cached_gpio = gpio;
407 mutex_unlock(&mcp->lock);
409 dev_dbg(mcp->chip.parent,
413 for (i = 0; i < mcp->chip.ngpio; i++) {
451 (BIT(i) & mcp->irq_rise) && gpio_set) ||
453 (BIT(i) & mcp->irq_fall) && !gpio_set) ||
455 child_irq = irq_find_mapping(mcp->chip.irq.domain, i);
463 mutex_unlock(&mcp->lock);
470 struct mcp23s08 *mcp = gpiochip_get_data(gc);
473 mcp_set_bit(mcp, MCP_GPINTEN, pos, false);
480 struct mcp23s08 *mcp = gpiochip_get_data(gc);
484 mcp_set_bit(mcp, MCP_GPINTEN, pos, true);
490 struct mcp23s08 *mcp = gpiochip_get_data(gc);
494 mcp_set_bit(mcp, MCP_INTCON, pos, false);
495 mcp->irq_rise |= BIT(pos);
496 mcp->irq_fall |= BIT(pos);
498 mcp_set_bit(mcp, MCP_INTCON, pos, false);
499 mcp->irq_rise |= BIT(pos);
500 mcp->irq_fall &= ~BIT(pos);
502 mcp_set_bit(mcp, MCP_INTCON, pos, false);
503 mcp->irq_rise &= ~BIT(pos);
504 mcp->irq_fall |= BIT(pos);
506 mcp_set_bit(mcp, MCP_INTCON, pos, true);
507 mcp_set_bit(mcp, MCP_DEFVAL, pos, false);
509 mcp_set_bit(mcp, MCP_INTCON, pos, true);
510 mcp_set_bit(mcp, MCP_DEFVAL, pos, true);
520 struct mcp23s08 *mcp = gpiochip_get_data(gc);
522 mutex_lock(&mcp->lock);
523 regcache_cache_only(mcp->regmap, true);
529 struct mcp23s08 *mcp = gpiochip_get_data(gc);
531 regcache_cache_only(mcp->regmap, false);
532 regcache_sync(mcp->regmap);
534 mutex_unlock(&mcp->lock);
537 static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
539 struct gpio_chip *chip = &mcp->chip;
543 if (mcp->irq_active_high)
548 err = devm_request_threaded_irq(chip->parent, mcp->irq, NULL,
550 irqflags, dev_name(chip->parent), mcp);
553 mcp->irq, err);
563 struct mcp23s08 *mcp = gpiochip_get_data(gc);
565 seq_printf(p, dev_name(mcp->dev));
581 int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
588 mutex_init(&mcp->lock);
590 mcp->dev = dev;
591 mcp->addr = addr;
593 mcp->irq_active_high = false;
595 mcp->chip.direction_input = mcp23s08_direction_input;
596 mcp->chip.get = mcp23s08_get;
597 mcp->chip.get_multiple = mcp23s08_get_multiple;
598 mcp->chip.direction_output = mcp23s08_direction_output;
599 mcp->chip.set = mcp23s08_set;
600 mcp->chip.set_multiple = mcp23s08_set_multiple;
602 mcp->chip.base = base;
603 mcp->chip.can_sleep = true;
604 mcp->chip.parent = dev;
605 mcp->chip.owner = THIS_MODULE;
607 mcp->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
613 ret = mcp_read(mcp, MCP_IOCON, &status);
617 mcp->irq_controller =
619 if (mcp->irq && mcp->irq_controller) {
620 mcp->irq_active_high =
629 mcp->irq_active_high || open_drain) {
633 if (mcp->irq_active_high)
647 ret = mcp_write(mcp, MCP_IOCON, status);
652 if (mcp->irq && mcp->irq_controller) {
653 struct gpio_irq_chip *girq = &mcp->chip.irq;
665 ret = devm_gpiochip_add_data(dev, &mcp->chip, mcp);
669 mcp->pinctrl_desc.pctlops = &mcp_pinctrl_ops;
670 mcp->pinctrl_desc.confops = &mcp_pinconf_ops;
671 mcp->pinctrl_desc.npins = mcp->chip.ngpio;
672 if (mcp->pinctrl_desc.npins == 8)
673 mcp->pinctrl_desc.pins = mcp23x08_pins;
674 else if (mcp->pinctrl_desc.npins == 16)
675 mcp->pinctrl_desc.pins = mcp23x17_pins;
676 mcp->pinctrl_desc.owner = THIS_MODULE;
678 mcp->pctldev = devm_pinctrl_register(dev, &mcp->pinctrl_desc, mcp);
679 if (IS_ERR(mcp->pctldev))
680 return dev_err_probe(dev, PTR_ERR(mcp->pctldev), "can't register controller\n");
682 if (mcp->irq) {
683 ret = mcp23s08_irq_setup(mcp);