Lines Matching defs:gctrl
28 struct eqbr_gpio_ctrl *gctrl = gpiochip_get_data(gc);
32 raw_spin_lock_irqsave(&gctrl->lock, flags);
33 writel(BIT(offset), gctrl->membase + GPIO_IRNENCLR);
34 raw_spin_unlock_irqrestore(&gctrl->lock, flags);
41 struct eqbr_gpio_ctrl *gctrl = gpiochip_get_data(gc);
47 raw_spin_lock_irqsave(&gctrl->lock, flags);
48 writel(BIT(offset), gctrl->membase + GPIO_IRNRNSET);
49 raw_spin_unlock_irqrestore(&gctrl->lock, flags);
55 struct eqbr_gpio_ctrl *gctrl = gpiochip_get_data(gc);
59 raw_spin_lock_irqsave(&gctrl->lock, flags);
60 writel(BIT(offset), gctrl->membase + GPIO_IRNCR);
61 raw_spin_unlock_irqrestore(&gctrl->lock, flags);
80 struct eqbr_gpio_ctrl *gctrl,
85 raw_spin_lock_irqsave(&gctrl->lock, flags);
86 eqbr_cfg_bit(gctrl->membase + GPIO_IRNCFG, offset, type->trig_type);
87 eqbr_cfg_bit(gctrl->membase + GPIO_EXINTCR1, offset, type->trig_type);
88 eqbr_cfg_bit(gctrl->membase + GPIO_EXINTCR0, offset, type->logic_type);
89 raw_spin_unlock_irqrestore(&gctrl->lock, flags);
97 struct eqbr_gpio_ctrl *gctrl = gpiochip_get_data(gc);
141 eqbr_irq_type_cfg(&it, gctrl, offset);
153 struct eqbr_gpio_ctrl *gctrl = gpiochip_get_data(gc);
158 pins = readl(gctrl->membase + GPIO_IRNCR);
177 static int gpiochip_setup(struct device *dev, struct eqbr_gpio_ctrl *gctrl)
182 gc = &gctrl->chip;
183 gc->label = gctrl->name;
184 gc->fwnode = gctrl->fwnode;
186 if (!fwnode_property_read_bool(gctrl->fwnode, "interrupt-controller")) {
188 gctrl->name);
192 girq = &gctrl->chip.irq;
202 girq->parents[0] = gctrl->virq;
210 struct eqbr_gpio_ctrl *gctrl;
216 gctrl = drvdata->gpio_ctrls + i;
217 np = to_of_node(gctrl->fwnode);
219 gctrl->name = devm_kasprintf(dev, GFP_KERNEL, "gpiochip%d", i);
220 if (!gctrl->name)
228 gctrl->membase = devm_ioremap_resource(dev, &res);
229 if (IS_ERR(gctrl->membase))
230 return PTR_ERR(gctrl->membase);
232 gctrl->virq = irq_of_parse_and_map(np, 0);
233 if (!gctrl->virq) {
235 gctrl->name);
238 raw_spin_lock_init(&gctrl->lock);
240 ret = bgpio_init(&gctrl->chip, dev, gctrl->bank->nr_pins / 8,
241 gctrl->membase + GPIO_IN,
242 gctrl->membase + GPIO_OUTSET,
243 gctrl->membase + GPIO_OUTCLR,
244 gctrl->membase + GPIO_DIR,
251 ret = gpiochip_setup(dev, gctrl);
255 ret = devm_gpiochip_add_data(dev, &gctrl->chip, gctrl);
385 struct eqbr_gpio_ctrl *gctrl;
425 gctrl = get_gpio_ctrls_via_bank(pctl, bank);
426 if (!gctrl) {
432 val = !!(readl(gctrl->membase + GPIO_DIR) & BIT(offset));
448 struct eqbr_gpio_ctrl *gctrl;
494 gctrl = get_gpio_ctrls_via_bank(pctl, bank);
495 if (!gctrl) {
500 gc = &gctrl->chip;