Lines Matching refs:chip
137 * @nport: Number of Gports in this chip
138 * @gpio_chip: gpiolib chip
310 static int cy8c95x0_pinmux_direction(struct cy8c95x0_pinctrl *chip,
313 static inline u8 cypress_get_port(struct cy8c95x0_pinctrl *chip, unsigned int pin)
319 static int cypress_get_pin_mask(struct cy8c95x0_pinctrl *chip, unsigned int pin)
410 static int cy8c95x0_write_regs_mask(struct cy8c95x0_pinctrl *chip, int reg,
421 bitmap_andnot(tmask, mask, chip->shiftmask, MAX_LINE);
423 bitmap_replace(tmask, tmask, mask, chip->shiftmask, BANK_SZ * 3);
425 bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE);
427 bitmap_replace(tval, tval, val, chip->shiftmask, BANK_SZ * 3);
429 mutex_lock(&chip->i2c_lock);
430 for (i = 0; i < chip->nport; i++) {
449 ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, i);
467 ret = regmap_update_bits(chip->regmap, off, bits, write_val);
472 mutex_unlock(&chip->i2c_lock);
475 dev_err(chip->dev, "failed writing register %d: err %d\n", off, ret);
480 static int cy8c95x0_read_regs_mask(struct cy8c95x0_pinctrl *chip, int reg,
492 bitmap_andnot(tmask, mask, chip->shiftmask, MAX_LINE);
494 bitmap_replace(tmask, tmask, mask, chip->shiftmask, BANK_SZ * 3);
496 bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE);
498 bitmap_replace(tval, tval, val, chip->shiftmask, BANK_SZ * 3);
500 mutex_lock(&chip->i2c_lock);
501 for (i = 0; i < chip->nport; i++) {
520 ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, i);
536 ret = regmap_read(chip->regmap, off, &read_val);
547 bitmap_replace(val, tmp, tval, chip->shiftmask, MAX_LINE);
550 mutex_unlock(&chip->i2c_lock);
553 dev_err(chip->dev, "failed reading register %d: err %d\n", off, ret);
566 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);
567 u8 port = cypress_get_port(chip, off);
569 u8 bit = cypress_get_pin_mask(chip, off);
573 ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
582 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);
583 u8 inreg = CY8C95X0_INPUT_(cypress_get_port(chip, off));
584 u8 bit = cypress_get_pin_mask(chip, off);
588 ret = regmap_read(chip->regmap, inreg, ®_val);
605 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);
606 u8 outreg = CY8C95X0_OUTPUT_(cypress_get_port(chip, off));
607 u8 bit = cypress_get_pin_mask(chip, off);
609 regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
614 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);
615 u8 port = cypress_get_port(chip, off);
616 u8 bit = cypress_get_pin_mask(chip, off);
620 mutex_lock(&chip->i2c_lock);
622 ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port);
626 ret = regmap_read(chip->regmap, CY8C95X0_DIRECTION, ®_val);
630 mutex_unlock(&chip->i2c_lock);
637 mutex_unlock(&chip->i2c_lock);
641 static int cy8c95x0_gpio_get_pincfg(struct cy8c95x0_pinctrl *chip,
646 u8 port = cypress_get_port(chip, off);
647 u8 bit = cypress_get_pin_mask(chip, off);
653 mutex_lock(&chip->i2c_lock);
656 ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port);
714 ret = regmap_read(chip->regmap, reg, ®_val);
722 mutex_unlock(&chip->i2c_lock);
727 static int cy8c95x0_gpio_set_pincfg(struct cy8c95x0_pinctrl *chip,
731 u8 port = cypress_get_port(chip, off);
732 u8 bit = cypress_get_pin_mask(chip, off);
738 mutex_lock(&chip->i2c_lock);
741 ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port);
747 __clear_bit(off, chip->push_pull);
751 __clear_bit(off, chip->push_pull);
755 __clear_bit(off, chip->push_pull);
759 __clear_bit(off, chip->push_pull);
763 __clear_bit(off, chip->push_pull);
767 __set_bit(off, chip->push_pull);
774 ret = cy8c95x0_pinmux_direction(chip, off, !arg);
777 ret = cy8c95x0_pinmux_direction(chip, off, arg);
787 ret = regmap_write_bits(chip->regmap, reg, bit, bit);
790 mutex_unlock(&chip->i2c_lock);
797 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);
799 return cy8c95x0_read_regs_mask(chip, CY8C95X0_INPUT, bits, mask);
805 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);
807 cy8c95x0_write_regs_mask(chip, CY8C95X0_OUTPUT, bits, mask);
812 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);
813 struct device *dev = chip->dev;
816 ret = gpiochip_add_pin_range(gc, dev_name(dev), 0, 0, chip->tpin);
823 static int cy8c95x0_setup_gpiochip(struct cy8c95x0_pinctrl *chip)
825 struct gpio_chip *gc = &chip->gpio_chip;
841 gc->ngpio = chip->tpin;
843 gc->parent = chip->dev;
847 gc->label = dev_name(chip->dev);
849 return devm_gpiochip_add_data(chip->dev, gc, chip);
855 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);
858 set_bit(hwirq, chip->irq_mask);
865 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);
869 clear_bit(hwirq, chip->irq_mask);
875 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);
877 mutex_lock(&chip->irq_lock);
883 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);
890 cy8c95x0_write_regs_mask(chip, CY8C95X0_INTMASK, chip->irq_mask, ones);
893 cy8c95x0_read_regs_mask(chip, CY8C95X0_DIRECTION, reg_direction, chip->irq_mask);
894 bitmap_or(irq_mask, chip->irq_mask, reg_direction, MAX_LINE);
898 cy8c95x0_write_regs_mask(chip, CY8C95X0_DIRECTION, ones, irq_mask);
900 mutex_unlock(&chip->irq_lock);
906 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);
923 dev_err(chip->dev, "irq %d: unsupported type %d\n", d->irq, type);
927 assign_bit(hwirq, chip->irq_trig_fall, trig_type & IRQ_TYPE_EDGE_FALLING);
928 assign_bit(hwirq, chip->irq_trig_raise, trig_type & IRQ_TYPE_EDGE_RISING);
929 assign_bit(hwirq, chip->irq_trig_low, type == IRQ_TYPE_LEVEL_LOW);
930 assign_bit(hwirq, chip->irq_trig_high, type == IRQ_TYPE_LEVEL_HIGH);
938 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);
941 clear_bit(hwirq, chip->irq_trig_raise);
942 clear_bit(hwirq, chip->irq_trig_fall);
943 clear_bit(hwirq, chip->irq_trig_low);
944 clear_bit(hwirq, chip->irq_trig_high);
959 static bool cy8c95x0_irq_pending(struct cy8c95x0_pinctrl *chip, unsigned long *pending)
969 if (cy8c95x0_read_regs_mask(chip, CY8C95X0_INTSTATUS, trigger, ones))
973 if (cy8c95x0_read_regs_mask(chip, CY8C95X0_INPUT, cur_stat, trigger))
977 bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise,
987 struct cy8c95x0_pinctrl *chip = devid;
988 struct gpio_chip *gc = &chip->gpio_chip;
993 ret = cy8c95x0_irq_pending(chip, pending);
1007 if (test_bit(level, chip->irq_trig_low))
1010 else if (test_bit(level, chip->irq_trig_high))
1024 struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev);
1026 return chip->tpin;
1056 struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev);
1063 if (cy8c95x0_read_regs_mask(chip, CY8C95X0_PWMSEL, pwm, mask)) {
1096 struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev);
1099 *num_groups = chip->tpin;
1103 static int cy8c95x0_set_mode(struct cy8c95x0_pinctrl *chip, unsigned int off, bool mode)
1105 u8 port = cypress_get_port(chip, off);
1106 u8 bit = cypress_get_pin_mask(chip, off);
1110 ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port);
1114 return regmap_write_bits(chip->regmap, CY8C95X0_PWMSEL, bit, mode ? bit : 0);
1117 static int cy8c95x0_pinmux_mode(struct cy8c95x0_pinctrl *chip,
1120 u8 port = cypress_get_port(chip, group);
1121 u8 bit = cypress_get_pin_mask(chip, group);
1124 ret = cy8c95x0_set_mode(chip, group, selector);
1132 ret = regmap_write_bits(chip->regmap, CY8C95X0_DIRECTION, bit, bit);
1136 return regmap_write_bits(chip->regmap, CY8C95X0_OUTPUT_(port), bit, bit);
1142 struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev);
1145 mutex_lock(&chip->i2c_lock);
1146 ret = cy8c95x0_pinmux_mode(chip, selector, group);
1147 mutex_unlock(&chip->i2c_lock);
1156 struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev);
1159 mutex_lock(&chip->i2c_lock);
1160 ret = cy8c95x0_set_mode(chip, pin, false);
1161 mutex_unlock(&chip->i2c_lock);
1166 static int cy8c95x0_pinmux_direction(struct cy8c95x0_pinctrl *chip,
1169 u8 port = cypress_get_port(chip, pin);
1170 u8 bit = cypress_get_pin_mask(chip, pin);
1174 ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port);
1179 ret = regmap_write_bits(chip->regmap, CY8C95X0_DIRECTION, bit, input ? bit : 0);
1187 if (input && test_bit(pin, chip->push_pull)) {
1188 ret = regmap_write_bits(chip->regmap, CY8C95X0_DRV_HIZ, bit, bit);
1192 __clear_bit(pin, chip->push_pull);
1202 struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev);
1205 mutex_lock(&chip->i2c_lock);
1206 ret = cy8c95x0_pinmux_direction(chip, pin, input);
1207 mutex_unlock(&chip->i2c_lock);
1225 struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev);
1227 return cy8c95x0_gpio_get_pincfg(chip, pin, config);
1233 struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev);
1238 ret = cy8c95x0_gpio_set_pincfg(chip, pin, configs[i]);
1252 static int cy8c95x0_irq_setup(struct cy8c95x0_pinctrl *chip, int irq)
1254 struct gpio_irq_chip *girq = &chip->gpio_chip.irq;
1258 mutex_init(&chip->irq_lock);
1263 ret = cy8c95x0_irq_pending(chip, pending_irqs);
1265 dev_err(chip->dev, "failed to clear irq status register\n");
1270 bitmap_fill(chip->irq_mask, MAX_LINE);
1282 ret = devm_request_threaded_irq(chip->dev, irq,
1285 dev_name(chip->dev), chip);
1287 dev_err(chip->dev, "failed to request irq %d\n", irq);
1290 dev_info(chip->dev, "Registered threaded IRQ\n");
1295 static int cy8c95x0_setup_pinctrl(struct cy8c95x0_pinctrl *chip)
1297 struct pinctrl_desc *pd = &chip->pinctrl_desc;
1302 pd->name = dev_name(chip->dev);
1304 pd->npins = chip->tpin;
1307 chip->pctldev = devm_pinctrl_register(chip->dev, pd, chip);
1308 if (IS_ERR(chip->pctldev))
1309 return dev_err_probe(chip->dev, PTR_ERR(chip->pctldev),
1342 dev_info(&client->dev, "Found a %s chip at 0x%02x.\n", name, client->addr);
1350 struct cy8c95x0_pinctrl *chip;
1354 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
1355 if (!chip)
1358 chip->dev = &client->dev;
1361 chip->driver_data = (unsigned long)device_get_match_data(&client->dev);
1362 if (!chip->driver_data)
1363 chip->driver_data = i2c_match_id(cy8c95x0_id, client)->driver_data;
1364 if (!chip->driver_data)
1367 i2c_set_clientdata(client, chip);
1369 chip->tpin = chip->driver_data & CY8C95X0_GPIO_MASK;
1370 chip->nport = DIV_ROUND_UP(CY8C95X0_PIN_TO_OFFSET(chip->tpin), BANK_SZ);
1372 switch (chip->tpin) {
1374 strscpy(chip->name, cy8c95x0_id[0].name, I2C_NAME_SIZE);
1377 strscpy(chip->name, cy8c95x0_id[1].name, I2C_NAME_SIZE);
1380 strscpy(chip->name, cy8c95x0_id[2].name, I2C_NAME_SIZE);
1396 chip->regulator = reg;
1399 /* bring the chip out of reset if reset pin is provided */
1400 chip->gpio_reset = devm_gpiod_get_optional(&client->dev, "reset", GPIOD_OUT_HIGH);
1401 if (IS_ERR(chip->gpio_reset)) {
1402 ret = dev_err_probe(chip->dev, PTR_ERR(chip->gpio_reset),
1405 } else if (chip->gpio_reset) {
1407 gpiod_set_value_cansleep(chip->gpio_reset, 0);
1410 gpiod_set_consumer_name(chip->gpio_reset, "CY8C95X0 RESET");
1413 chip->regmap = devm_regmap_init_i2c(client, &cy8c95x0_i2c_regmap);
1414 if (IS_ERR(chip->regmap)) {
1415 ret = PTR_ERR(chip->regmap);
1419 bitmap_zero(chip->push_pull, MAX_LINE);
1420 bitmap_zero(chip->shiftmask, MAX_LINE);
1421 bitmap_set(chip->shiftmask, 0, 20);
1422 mutex_init(&chip->i2c_lock);
1431 ret = cy8c95x0_irq_setup(chip, client->irq);
1436 ret = cy8c95x0_setup_pinctrl(chip);
1440 ret = cy8c95x0_setup_gpiochip(chip);
1447 if (!IS_ERR_OR_NULL(chip->regulator))
1448 regulator_disable(chip->regulator);
1454 struct cy8c95x0_pinctrl *chip = i2c_get_clientdata(client);
1456 if (!IS_ERR_OR_NULL(chip->regulator))
1457 regulator_disable(chip->regulator);