Lines Matching refs:pio
191 enum at91_mux (*get_periph)(void __iomem *pio, unsigned mask);
192 void (*mux_A_periph)(void __iomem *pio, unsigned mask);
193 void (*mux_B_periph)(void __iomem *pio, unsigned mask);
194 void (*mux_C_periph)(void __iomem *pio, unsigned mask);
195 void (*mux_D_periph)(void __iomem *pio, unsigned mask);
196 bool (*get_deglitch)(void __iomem *pio, unsigned pin);
197 void (*set_deglitch)(void __iomem *pio, unsigned mask, bool is_on);
198 bool (*get_debounce)(void __iomem *pio, unsigned pin, u32 *div);
199 void (*set_debounce)(void __iomem *pio, unsigned mask, bool is_on, u32 div);
200 bool (*get_pulldown)(void __iomem *pio, unsigned pin);
201 void (*set_pulldown)(void __iomem *pio, unsigned mask, bool is_on);
202 bool (*get_schmitt_trig)(void __iomem *pio, unsigned pin);
203 void (*disable_schmitt_trig)(void __iomem *pio, unsigned mask);
204 unsigned (*get_drivestrength)(void __iomem *pio, unsigned pin);
205 void (*set_drivestrength)(void __iomem *pio, unsigned pin,
207 unsigned (*get_slewrate)(void __iomem *pio, unsigned pin);
208 void (*set_slewrate)(void __iomem *pio, unsigned pin, u32 slewrate);
404 static void at91_mux_disable_interrupt(void __iomem *pio, unsigned mask)
406 writel_relaxed(mask, pio + PIO_IDR);
409 static unsigned at91_mux_get_pullup(void __iomem *pio, unsigned pin)
411 return !((readl_relaxed(pio + PIO_PUSR) >> pin) & 0x1);
414 static void at91_mux_set_pullup(void __iomem *pio, unsigned mask, bool on)
417 writel_relaxed(mask, pio + PIO_PPDDR);
419 writel_relaxed(mask, pio + (on ? PIO_PUER : PIO_PUDR));
422 static bool at91_mux_get_output(void __iomem *pio, unsigned int pin, bool *val)
424 *val = (readl_relaxed(pio + PIO_ODSR) >> pin) & 0x1;
425 return (readl_relaxed(pio + PIO_OSR) >> pin) & 0x1;
428 static void at91_mux_set_output(void __iomem *pio, unsigned int mask,
431 writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR));
432 writel_relaxed(mask, pio + (is_on ? PIO_OER : PIO_ODR));
435 static unsigned at91_mux_get_multidrive(void __iomem *pio, unsigned pin)
437 return (readl_relaxed(pio + PIO_MDSR) >> pin) & 0x1;
440 static void at91_mux_set_multidrive(void __iomem *pio, unsigned mask, bool on)
442 writel_relaxed(mask, pio + (on ? PIO_MDER : PIO_MDDR));
445 static void at91_mux_set_A_periph(void __iomem *pio, unsigned mask)
447 writel_relaxed(mask, pio + PIO_ASR);
450 static void at91_mux_set_B_periph(void __iomem *pio, unsigned mask)
452 writel_relaxed(mask, pio + PIO_BSR);
455 static void at91_mux_pio3_set_A_periph(void __iomem *pio, unsigned mask)
458 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) & ~mask,
459 pio + PIO_ABCDSR1);
460 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) & ~mask,
461 pio + PIO_ABCDSR2);
464 static void at91_mux_pio3_set_B_periph(void __iomem *pio, unsigned mask)
466 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) | mask,
467 pio + PIO_ABCDSR1);
468 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) & ~mask,
469 pio + PIO_ABCDSR2);
472 static void at91_mux_pio3_set_C_periph(void __iomem *pio, unsigned mask)
474 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) & ~mask, pio + PIO_ABCDSR1);
475 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);
478 static void at91_mux_pio3_set_D_periph(void __iomem *pio, unsigned mask)
480 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) | mask, pio + PIO_ABCDSR1);
481 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);
484 static enum at91_mux at91_mux_pio3_get_periph(void __iomem *pio, unsigned mask)
488 if (readl_relaxed(pio + PIO_PSR) & mask)
491 select = !!(readl_relaxed(pio + PIO_ABCDSR1) & mask);
492 select |= (!!(readl_relaxed(pio + PIO_ABCDSR2) & mask) << 1);
497 static enum at91_mux at91_mux_get_periph(void __iomem *pio, unsigned mask)
501 if (readl_relaxed(pio + PIO_PSR) & mask)
504 select = readl_relaxed(pio + PIO_ABSR) & mask;
509 static bool at91_mux_get_deglitch(void __iomem *pio, unsigned pin)
511 return (readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1;
514 static void at91_mux_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)
516 writel_relaxed(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
519 static bool at91_mux_pio3_get_deglitch(void __iomem *pio, unsigned pin)
521 if ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1)
522 return !((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1);
527 static void at91_mux_pio3_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)
530 writel_relaxed(mask, pio + PIO_IFSCDR);
531 at91_mux_set_deglitch(pio, mask, is_on);
534 static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div)
536 *div = readl_relaxed(pio + PIO_SCDR);
538 return ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1) &&
539 ((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1);
542 static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask,
546 writel_relaxed(mask, pio + PIO_IFSCER);
547 writel_relaxed(div & PIO_SCDR_DIV, pio + PIO_SCDR);
548 writel_relaxed(mask, pio + PIO_IFER);
550 writel_relaxed(mask, pio + PIO_IFSCDR);
553 static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin)
555 return !((readl_relaxed(pio + PIO_PPDSR) >> pin) & 0x1);
558 static void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool is_on)
561 writel_relaxed(mask, pio + PIO_PUDR);
563 writel_relaxed(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR));
566 static void at91_mux_pio3_disable_schmitt_trig(void __iomem *pio, unsigned mask)
568 writel_relaxed(readl_relaxed(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT);
571 static bool at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin)
573 return (readl_relaxed(pio + PIO_SCHMITT) >> pin) & 0x1;
585 static unsigned at91_mux_sama5d3_get_drivestrength(void __iomem *pio,
588 unsigned tmp = read_drive_strength(pio +
599 static unsigned at91_mux_sam9x5_get_drivestrength(void __iomem *pio,
602 unsigned tmp = read_drive_strength(pio +
612 static unsigned at91_mux_sam9x60_get_drivestrength(void __iomem *pio,
615 unsigned tmp = readl_relaxed(pio + SAM9X60_PIO_DRIVER1);
623 static unsigned at91_mux_sam9x60_get_slewrate(void __iomem *pio, unsigned pin)
625 unsigned tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR);
644 static void at91_mux_sama5d3_set_drivestrength(void __iomem *pio, unsigned pin,
652 set_drive_strength(pio + sama5d3_get_drive_register(pin), pin, setting);
655 static void at91_mux_sam9x5_set_drivestrength(void __iomem *pio, unsigned pin,
666 set_drive_strength(pio + at91sam9x5_get_drive_register(pin), pin,
670 static void at91_mux_sam9x60_set_drivestrength(void __iomem *pio, unsigned pin,
680 tmp = readl_relaxed(pio + SAM9X60_PIO_DRIVER1);
688 writel_relaxed(tmp, pio + SAM9X60_PIO_DRIVER1);
691 static void at91_mux_sam9x60_set_slewrate(void __iomem *pio, unsigned pin,
699 tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR);
706 writel_relaxed(tmp, pio + SAM9X60_PIO_SLEWR);
780 dev_dbg(dev, "pio%c%d configured as periph%c with conf = 0x%lx\n",
783 dev_dbg(dev, "pio%c%d configured as gpio with conf = 0x%lx\n",
824 dev_err(info->dev, "%s: pin conf %d mux_id %d not supported for pio%c%d\n",
832 static void at91_mux_gpio_disable(void __iomem *pio, unsigned mask)
834 writel_relaxed(mask, pio + PIO_PDR);
837 static void at91_mux_gpio_enable(void __iomem *pio, unsigned mask, bool input)
839 writel_relaxed(mask, pio + PIO_PER);
840 writel_relaxed(mask, pio + (input ? PIO_ODR : PIO_OER));
852 void __iomem *pio;
869 pio = pin_to_controller(info, pin->bank);
871 if (!pio)
875 at91_mux_disable_interrupt(pio, mask);
878 at91_mux_gpio_enable(pio, mask, 1);
881 info->ops->mux_A_periph(pio, mask);
884 info->ops->mux_B_periph(pio, mask);
889 info->ops->mux_C_periph(pio, mask);
894 info->ops->mux_D_periph(pio, mask);
898 at91_mux_gpio_disable(pio, mask);
986 void __iomem *pio;
993 pio = pin_to_controller(info, pin_to_bank(pin_id));
995 if (!pio)
1000 if (at91_mux_get_multidrive(pio, pin))
1003 if (at91_mux_get_pullup(pio, pin))
1006 if (info->ops->get_deglitch && info->ops->get_deglitch(pio, pin))
1008 if (info->ops->get_debounce && info->ops->get_debounce(pio, pin, &div))
1010 if (info->ops->get_pulldown && info->ops->get_pulldown(pio, pin))
1012 if (info->ops->get_schmitt_trig && info->ops->get_schmitt_trig(pio, pin))
1015 *config |= (info->ops->get_drivestrength(pio, pin)
1018 *config |= (info->ops->get_slewrate(pio, pin) << SLEWRATE_SHIFT);
1019 if (at91_mux_get_output(pio, pin, &out))
1031 void __iomem *pio;
1042 pio = pin_to_controller(info, pin_to_bank(pin_id));
1044 if (!pio)
1053 at91_mux_set_output(pio, mask, config & OUTPUT,
1055 at91_mux_set_pullup(pio, mask, config & PULL_UP);
1056 at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE);
1058 info->ops->set_deglitch(pio, mask, config & DEGLITCH);
1060 info->ops->set_debounce(pio, mask, config & DEBOUNCE,
1063 info->ops->set_pulldown(pio, mask, config & PULL_DOWN);
1065 info->ops->disable_schmitt_trig(pio, mask);
1067 info->ops->set_drivestrength(pio, pin,
1071 info->ops->set_slewrate(pio, pin,
1391 names = devm_kasprintf_strarray(dev, "pio", MAX_NB_GPIO_PER_BANK);
1424 void __iomem *pio = at91_gpio->regbase;
1428 osr = readl_relaxed(pio + PIO_OSR);
1438 void __iomem *pio = at91_gpio->regbase;
1441 writel_relaxed(mask, pio + PIO_ODR);
1448 void __iomem *pio = at91_gpio->regbase;
1452 pdsr = readl_relaxed(pio + PIO_PDSR);
1460 void __iomem *pio = at91_gpio->regbase;
1463 writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR));
1470 void __iomem *pio = at91_gpio->regbase;
1477 writel_relaxed(set_mask, pio + PIO_SODR);
1478 writel_relaxed(clear_mask, pio + PIO_CODR);
1485 void __iomem *pio = at91_gpio->regbase;
1488 writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR));
1489 writel_relaxed(mask, pio + PIO_OER);
1500 void __iomem *pio = at91_gpio->regbase;
1506 mode = at91_gpio->ops->get_periph(pio, mask);
1512 readl_relaxed(pio + PIO_OSR) & mask ?
1515 readl_relaxed(pio + PIO_PDSR) & mask ?
1558 void __iomem *pio = at91_gpio->regbase;
1564 if (pio)
1565 writel_relaxed(mask, pio + PIO_IDR);
1571 void __iomem *pio = at91_gpio->regbase;
1577 if (pio)
1578 writel_relaxed(mask, pio + PIO_IER);
1596 void __iomem *pio = at91_gpio->regbase;
1602 writel_relaxed(mask, pio + PIO_ESR);
1603 writel_relaxed(mask, pio + PIO_REHLSR);
1607 writel_relaxed(mask, pio + PIO_ESR);
1608 writel_relaxed(mask, pio + PIO_FELLSR);
1612 writel_relaxed(mask, pio + PIO_LSR);
1613 writel_relaxed(mask, pio + PIO_FELLSR);
1617 writel_relaxed(mask, pio + PIO_LSR);
1618 writel_relaxed(mask, pio + PIO_REHLSR);
1626 writel_relaxed(mask, pio + PIO_AIMDR);
1635 writel_relaxed(mask, pio + PIO_AIMER);
1663 void __iomem *pio = at91_chip->regbase;
1665 at91_chip->backups = readl_relaxed(pio + PIO_IMR);
1666 writel_relaxed(at91_chip->backups, pio + PIO_IDR);
1667 writel_relaxed(at91_chip->wakeups, pio + PIO_IER);
1681 void __iomem *pio = at91_chip->regbase;
1686 writel_relaxed(at91_chip->wakeups, pio + PIO_IDR);
1687 writel_relaxed(at91_chip->backups, pio + PIO_IER);
1697 void __iomem *pio = at91_gpio->regbase;
1707 isr = readl_relaxed(pio + PIO_ISR) & readl_relaxed(pio + PIO_IMR);
1712 pio = at91_gpio->regbase;
1872 names = devm_kasprintf_strarray(dev, "pio", chip->ngpio);