Lines Matching defs:devdata
53 if (pin >= pctl->devdata->type1_start && pin < pctl->devdata->type1_end)
61 return ((pin >> pctl->devdata->mode_shf) & pctl->devdata->port_mask)
62 << pctl->devdata->port_shf;
73 reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dir_offset;
74 bit = BIT(offset & pctl->devdata->mode_mask);
76 if (pctl->devdata->spec_dir_set)
77 pctl->devdata->spec_dir_set(®_addr, offset);
95 reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dout_offset;
96 bit = BIT(offset & pctl->devdata->mode_mask);
116 if (!pctl->devdata->spec_ies_smt_set &&
117 pctl->devdata->ies_offset == MTK_PINCTRL_NOT_SUPPORT &&
121 if (!pctl->devdata->spec_ies_smt_set &&
122 pctl->devdata->smt_offset == MTK_PINCTRL_NOT_SUPPORT &&
130 if (pctl->devdata->spec_ies_smt_set) {
131 return pctl->devdata->spec_ies_smt_set(mtk_get_regmap(pctl, pin),
132 pctl->devdata, pin, value, arg);
136 offset = pctl->devdata->ies_offset;
138 offset = pctl->devdata->smt_offset;
140 bit = BIT(offset & pctl->devdata->mode_mask);
152 const struct mtk_pinctrl_devdata *devdata,
160 ies_smt_infos = devdata->spec_ies;
161 info_num = devdata->n_spec_ies;
164 ies_smt_infos = devdata->spec_smt;
165 info_num = devdata->n_spec_smt;
185 reg_addr = ies_smt_infos[i].offset + devdata->port_align;
187 reg_addr = ies_smt_infos[i].offset + (devdata->port_align << 1);
198 for (i = 0; i < pctl->devdata->n_pin_drv_grps; i++) {
200 pctl->devdata->pin_drv_grp + i;
216 if (pin >= pctl->devdata->npins)
220 if (!pin_drv || pin_drv->grp > pctl->devdata->n_grp_cls)
223 drv_grp = pctl->devdata->grp_desc + pin_drv->grp;
240 const struct mtk_pinctrl_devdata *devdata,
249 if (!devdata->spec_pupd)
252 for (i = 0; i < devdata->n_spec_pupd; i++) {
253 if (pin == devdata->spec_pupd[i].pin) {
262 spec_pupd_pin = devdata->spec_pupd + i;
263 reg_set = spec_pupd_pin->offset + devdata->port_align;
264 reg_rst = spec_pupd_pin->offset + (devdata->port_align << 1);
312 if (pctl->devdata->spec_pull_set) {
317 ret = pctl->devdata->spec_pull_set(mtk_get_regmap(pctl, pin),
318 pctl->devdata, pin, isup,
331 if (pctl->devdata->mt8365_set_clr_mode) {
332 bit = pin & pctl->devdata->mode_mask;
334 pctl->devdata->pullen_offset;
336 pctl->devdata->pullsel_offset;
337 ret = pctl->devdata->mt8365_set_clr_mode(mtk_get_regmap(pctl, pin),
346 bit = BIT(pin & pctl->devdata->mode_mask);
349 pctl->devdata->pullen_offset, pctl);
352 pctl->devdata->pullen_offset, pctl);
356 pctl->devdata->pullsel_offset, pctl);
359 pctl->devdata->pullsel_offset, pctl);
459 const struct mtk_desc_pin *pin = pctl->devdata->pins + pin_num;
476 for (i = 0; i < pctl->devdata->npins; i++) {
477 const struct mtk_desc_pin *pin = pctl->devdata->pins + i;
583 if (pin >= pctl->devdata->npins ||
714 if (pctl->devdata->spec_pinmux_set)
715 pctl->devdata->spec_pinmux_set(mtk_get_regmap(pctl, pin),
718 reg_addr = ((pin / pctl->devdata->mode_per_reg) << pctl->devdata->port_shf)
719 + pctl->devdata->pinmux_offset;
722 bit = pin % pctl->devdata->mode_per_reg;
735 for (i = 0; i < pctl->devdata->npins; i++) {
736 pin = pctl->devdata->pins + i;
770 const struct mtk_desc_pin *pin = pctl->devdata->pins + offset;
832 reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dir_offset;
833 bit = BIT(offset & pctl->devdata->mode_mask);
835 if (pctl->devdata->spec_dir_set)
836 pctl->devdata->spec_dir_set(®_addr, offset);
853 pctl->devdata->din_offset;
855 bit = BIT(offset & pctl->devdata->mode_mask);
866 pin = pctl->devdata->pins + offset;
886 pin = pctl->devdata->pins + offset;
933 pctl->ngroups = pctl->devdata->npins;
947 for (i = 0; i < pctl->devdata->npins; i++) {
948 const struct mtk_desc_pin *pin = pctl->devdata->pins + i;
1040 pctl->eint->regs = pctl->devdata->eint_regs;
1041 pctl->eint->hw = &pctl->devdata->eint_hw;
1086 pctl->devdata = data;
1091 pins = devm_kcalloc(&pdev->dev, pctl->devdata->npins, sizeof(*pins),
1096 for (i = 0; i < pctl->devdata->npins; i++)
1097 pins[i] = pctl->devdata->pins[i].pin;
1102 pctl->pctl_desc.npins = pctl->devdata->npins;
1119 pctl->chip->ngpio = pctl->devdata->npins;
1130 0, 0, pctl->devdata->npins);