Lines Matching refs:value
246 u32 value;
248 value = ioread32(ioxapic_use);
251 return !!(value & BIT(offset - 8 + 0));
253 return !!(value & BIT(offset - 13 + 3));
255 return !!(value & BIT(offset - 45 + 5));
266 u32 value, mode;
268 value = ioread32(reg);
270 mode = value & USE_SEL_MASK;
276 seq_printf(s, "0x%08x 0x%08x", value, ioread32(conf2));
302 u32 value;
304 value = ioread32(reg);
306 value &= ~USE_SEL_MASK;
308 value |= grp->modes[i];
310 value |= grp->mode;
312 iowrite32(value, reg);
338 u32 value;
348 value = ioread32(reg);
349 if ((value & USE_SEL_MASK) != USE_SEL_GPIO) {
350 iowrite32((value & USE_SEL_MASK) | USE_SEL_GPIO, reg);
387 u32 value;
391 value = ioread32(reg);
392 value &= ~DIR_BIT;
394 value |= DIR_BIT;
405 iowrite32(value, reg);
429 u32 value, pull;
433 value = ioread32(conf2);
436 pull = value & GPIWP_MASK;
473 u32 value;
477 value = ioread32(conf2);
484 value &= ~GPIWP_MASK;
485 value |= GPIWP_NONE;
488 value &= ~GPIWP_MASK;
489 value |= GPIWP_DOWN;
492 value &= ~GPIWP_MASK;
493 value |= GPIWP_UP;
504 iowrite32(value, conf2);
530 static void lp_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
538 if (value)
552 int value)
554 lp_gpio_set(chip, offset, value);
651 u32 value;
664 value = ioread32(reg);
668 value &= ~(TRIG_SEL_BIT | INT_INV_BIT);
672 value = (value | INT_INV_BIT) & ~TRIG_SEL_BIT;
676 value = (value | TRIG_SEL_BIT) & ~INT_INV_BIT;
680 value |= TRIG_SEL_BIT | INT_INV_BIT;
682 iowrite32(value, reg);