Lines Matching defs:lg
212 struct intel_pinctrl *lg = gpiochip_get_data(chip);
216 comm = intel_get_community(lg, offset);
232 static bool lp_gpio_acpi_use(struct intel_pinctrl *lg, unsigned int pin)
236 acpi_use = lp_gpio_reg(&lg->chip, pin, LP_ACPI_OWNED);
263 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
264 void __iomem *reg = lp_gpio_reg(&lg->chip, pin, LP_CONFIG1);
265 void __iomem *conf2 = lp_gpio_reg(&lg->chip, pin, LP_CONFIG2);
278 if (lp_gpio_acpi_use(lg, pin))
292 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
293 const struct intel_pingroup *grp = &lg->soc->groups[group];
297 raw_spin_lock_irqsave(&lg->lock, flags);
301 void __iomem *reg = lp_gpio_reg(&lg->chip, grp->grp.pins[i], LP_CONFIG1);
315 raw_spin_unlock_irqrestore(&lg->lock, flags);
334 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
335 void __iomem *reg = lp_gpio_reg(&lg->chip, pin, LP_CONFIG1);
336 void __iomem *conf2 = lp_gpio_reg(&lg->chip, pin, LP_CONFIG2);
340 pm_runtime_get(lg->dev);
342 raw_spin_lock_irqsave(&lg->lock, flags);
351 dev_warn(lg->dev, FW_BUG "pin %u forcibly reconfigured as GPIO\n", pin);
357 raw_spin_unlock_irqrestore(&lg->lock, flags);
366 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
367 void __iomem *conf2 = lp_gpio_reg(&lg->chip, pin, LP_CONFIG2);
370 raw_spin_lock_irqsave(&lg->lock, flags);
375 raw_spin_unlock_irqrestore(&lg->lock, flags);
377 pm_runtime_put(lg->dev);
384 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
385 void __iomem *reg = lp_gpio_reg(&lg->chip, pin, LP_CONFIG1);
389 raw_spin_lock_irqsave(&lg->lock, flags);
402 WARN(lp_gpio_ioxapic_use(&lg->chip, pin),
407 raw_spin_unlock_irqrestore(&lg->lock, flags);
425 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
426 void __iomem *conf2 = lp_gpio_reg(&lg->chip, pin, LP_CONFIG2);
432 raw_spin_lock_irqsave(&lg->lock, flags);
434 raw_spin_unlock_irqrestore(&lg->lock, flags);
468 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
469 void __iomem *conf2 = lp_gpio_reg(&lg->chip, pin, LP_CONFIG2);
475 raw_spin_lock_irqsave(&lg->lock, flags);
506 raw_spin_unlock_irqrestore(&lg->lock, flags);
532 struct intel_pinctrl *lg = gpiochip_get_data(chip);
536 raw_spin_lock_irqsave(&lg->lock, flags);
543 raw_spin_unlock_irqrestore(&lg->lock, flags);
573 struct intel_pinctrl *lg = gpiochip_get_data(gc);
580 for (base = 0; base < lg->chip.ngpio; base += 32) {
581 reg = lp_gpio_reg(&lg->chip, base, LP_INT_STAT);
582 ena = lp_gpio_reg(&lg->chip, base, LP_INT_ENABLE);
588 generic_handle_domain_irq(lg->chip.irq.domain, base + pin);
596 struct intel_pinctrl *lg = gpiochip_get_data(gc);
598 void __iomem *reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_STAT);
601 raw_spin_lock_irqsave(&lg->lock, flags);
603 raw_spin_unlock_irqrestore(&lg->lock, flags);
617 struct intel_pinctrl *lg = gpiochip_get_data(gc);
619 void __iomem *reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE);
624 raw_spin_lock_irqsave(&lg->lock, flags);
626 raw_spin_unlock_irqrestore(&lg->lock, flags);
632 struct intel_pinctrl *lg = gpiochip_get_data(gc);
634 void __iomem *reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE);
637 raw_spin_lock_irqsave(&lg->lock, flags);
639 raw_spin_unlock_irqrestore(&lg->lock, flags);
647 struct intel_pinctrl *lg = gpiochip_get_data(gc);
653 reg = lp_gpio_reg(&lg->chip, hwirq, LP_CONFIG1);
658 if (lp_gpio_acpi_use(lg, hwirq)) {
659 dev_err(lg->dev, "pin %lu can't be used as IRQ\n", hwirq);
663 raw_spin_lock_irqsave(&lg->lock, flags);
689 raw_spin_unlock_irqrestore(&lg->lock, flags);
708 struct intel_pinctrl *lg = gpiochip_get_data(chip);
712 for (base = 0; base < lg->chip.ngpio; base += 32) {
714 reg = lp_gpio_reg(&lg->chip, base, LP_INT_ENABLE);
717 reg = lp_gpio_reg(&lg->chip, base, LP_INT_STAT);
726 struct intel_pinctrl *lg = gpiochip_get_data(chip);
727 struct device *dev = lg->dev;
730 ret = gpiochip_add_pin_range(chip, dev_name(dev), 0, 0, lg->soc->npins);
740 struct intel_pinctrl *lg;
752 lg = devm_kzalloc(dev, sizeof(*lg), GFP_KERNEL);
753 if (!lg)
756 lg->dev = dev;
757 lg->soc = soc;
759 lg->ncommunities = lg->soc->ncommunities;
760 lg->communities = devm_kcalloc(dev, lg->ncommunities,
761 sizeof(*lg->communities), GFP_KERNEL);
762 if (!lg->communities)
765 lg->pctldesc = lptlp_pinctrl_desc;
766 lg->pctldesc.name = dev_name(dev);
767 lg->pctldesc.pins = lg->soc->pins;
768 lg->pctldesc.npins = lg->soc->npins;
770 lg->pctldev = devm_pinctrl_register(dev, &lg->pctldesc, lg);
771 if (IS_ERR(lg->pctldev)) {
773 return PTR_ERR(lg->pctldev);
776 platform_set_drvdata(pdev, lg);
790 for (i = 0; i < lg->soc->ncommunities; i++) {
791 struct intel_community *comm = &lg->communities[i];
793 *comm = lg->soc->communities[i];
799 raw_spin_lock_init(&lg->lock);
801 gc = &lg->chip;
838 ret = devm_gpiochip_add_data(dev, gc, lg);
867 struct intel_pinctrl *lg = dev_get_drvdata(dev);
868 struct gpio_chip *chip = &lg->chip;