Lines Matching refs:pins
190 /* Some of LPE I2S TXD pins need to have OE inversion set */
239 * Only do pinmuxing for certain LPSS devices for now. Rest of the pins are
279 .pins = southwest_pins,
373 .pins = north_pins,
418 .pins = east_pins,
542 .pins = southeast_pins,
675 if (chv_pad_locked(pctrl, grp->grp.pins[i])) {
677 dev_warn(dev, "unable to set mode for locked pin %u\n", grp->grp.pins[i]);
683 int pin = grp->grp.pins[i];
1065 const unsigned int *pins;
1069 ret = intel_get_group_pins(pctldev, group, &pins, &npins);
1073 ret = chv_config_get(pctldev, pins[0], config);
1084 const unsigned int *pins;
1088 ret = intel_get_group_pins(pctldev, group, &pins, &npins);
1093 ret = chv_config_set(pctldev, pins[i], configs, num_configs);
1463 * break such machines we will only mask pins from irqdomain if the machine
1512 desc = &pctrl->soc->pins[i];
1580 chip->ngpio = pctrl->soc->pins[pctrl->soc->npins - 1].number + 1;
1706 pctrl->pctldesc.pins = pctrl->soc->pins;
1758 desc = &pctrl->soc->pins[i];
1794 desc = &pctrl->soc->pins[i];
1816 * Now that all pins are restored to known state, we can restore