Lines Matching refs:vg
555 static void __iomem *byt_gpio_reg(struct intel_pinctrl *vg, unsigned int offset,
558 struct intel_community *comm = intel_get_community(vg, offset);
586 static void byt_set_group_simple_mux(struct intel_pinctrl *vg,
599 padcfg0 = byt_gpio_reg(vg, group.grp.pins[i], BYT_CONF0_REG);
601 dev_warn(vg->dev, "Group %s, pin %i not muxed (can't retrieve CONF0)\n",
615 static void byt_set_group_mixed_mux(struct intel_pinctrl *vg,
628 padcfg0 = byt_gpio_reg(vg, group.grp.pins[i], BYT_CONF0_REG);
630 dev_warn(vg->dev, "Group %s, pin %i not muxed (can't retrieve CONF0)\n",
647 struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
648 const struct intel_function func = vg->soc->functions[func_selector];
649 const struct intel_pingroup group = vg->soc->groups[group_selector];
652 byt_set_group_mixed_mux(vg, group, group.modes);
654 byt_set_group_simple_mux(vg, group, BYT_DEFAULT_GPIO_MUX);
656 byt_set_group_simple_mux(vg, group, group.mode);
661 static u32 byt_get_gpio_mux(struct intel_pinctrl *vg, unsigned int offset)
664 if (!strcmp(vg->soc->uid, BYT_SCORE_ACPI_UID) &&
669 if (!strcmp(vg->soc->uid, BYT_SUS_ACPI_UID) &&
676 static void byt_gpio_clear_triggering(struct intel_pinctrl *vg, unsigned int offset)
678 void __iomem *reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
697 struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);
698 void __iomem *reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
714 gpio_mux = byt_get_gpio_mux(vg, offset);
720 dev_warn(vg->dev, FW_BUG "Pin %i: forcibly re-configured as GPIO\n", offset);
725 pm_runtime_get(vg->dev);
734 struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);
736 byt_gpio_clear_triggering(vg, offset);
737 pm_runtime_put(vg->dev);
740 static void byt_gpio_direct_irq_check(struct intel_pinctrl *vg,
743 void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
752 dev_info_once(vg->dev,
762 struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);
763 void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
774 byt_gpio_direct_irq_check(vg, offset);
838 struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);
840 void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
841 void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
842 void __iomem *db_reg = byt_gpio_reg(vg, offset, BYT_DEBOUNCE_REG);
923 struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);
924 void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
925 void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
926 void __iomem *db_reg = byt_gpio_reg(vg, offset, BYT_DEBOUNCE_REG);
958 dev_warn(vg->dev, "Pin %i: forcibly set to input mode\n", offset);
978 dev_warn(vg->dev, "Pin %i: forcibly set to input mode\n", offset);
1066 struct intel_pinctrl *vg = gpiochip_get_data(chip);
1067 void __iomem *reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
1080 struct intel_pinctrl *vg = gpiochip_get_data(chip);
1081 void __iomem *reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
1099 struct intel_pinctrl *vg = gpiochip_get_data(chip);
1100 void __iomem *reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
1121 struct intel_pinctrl *vg = gpiochip_get_data(chip);
1122 void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
1146 struct intel_pinctrl *vg = gpiochip_get_data(chip);
1147 void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
1153 byt_gpio_direct_irq_check(vg, offset);
1170 struct intel_pinctrl *vg = gpiochip_get_data(chip);
1174 for (i = 0; i < vg->soc->npins; i++) {
1183 pin = vg->soc->pins[i].number;
1185 conf_reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG);
1191 val_reg = byt_gpio_reg(vg, pin, BYT_VAL_REG);
1202 comm = intel_get_community(vg, pin);
1276 struct intel_pinctrl *vg = gpiochip_get_data(gc);
1280 reg = byt_gpio_reg(vg, hwirq, BYT_INT_STAT_REG);
1292 struct intel_pinctrl *vg = gpiochip_get_data(gc);
1295 byt_gpio_clear_triggering(vg, hwirq);
1302 struct intel_pinctrl *vg = gpiochip_get_data(gc);
1310 reg = byt_gpio_reg(vg, hwirq, BYT_CONF0_REG);
1342 struct intel_pinctrl *vg = gpiochip_get_data(irq_data_get_irq_chip_data(d));
1348 reg = byt_gpio_reg(vg, hwirq, BYT_CONF0_REG);
1392 struct intel_pinctrl *vg = gpiochip_get_data(irq_desc_get_handler_data(desc));
1399 for (base = 0; base < vg->chip.ngpio; base += 32) {
1400 reg = byt_gpio_reg(vg, base, BYT_INT_STAT_REG);
1403 dev_warn(vg->dev, "Pin %i: can't retrieve INT_STAT%u\n", base / 32, base);
1411 generic_handle_domain_irq(vg->chip.irq.domain, base + pin);
1416 static bool byt_direct_irq_sanity_check(struct intel_pinctrl *vg, int pin, u32 conf0)
1422 memcpy_fromio(direct_irq_mux, vg->communities->pad_regs + BYT_DIRECT_IRQ_REG,
1426 dev_warn(vg->dev, FW_BUG "Pin %i: DIRECT_IRQ_EN set but no IRQ assigned, clearing\n", pin);
1432 ioapic_direct_irq_base = (vg->communities->npins == BYT_NGPIO_SCORE) ? 51 : 67;
1433 dev_dbg(vg->dev, "Pin %i: uses direct IRQ %d (IO-APIC %d)\n", pin,
1453 dev_warn(vg->dev,
1466 struct intel_pinctrl *vg = gpiochip_get_data(chip);
1476 for (i = 0; i < vg->soc->npins; i++) {
1477 unsigned int pin = vg->soc->pins[i].number;
1479 reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG);
1481 dev_warn(vg->dev, "Pin %i: could not retrieve CONF0\n", i);
1487 if (byt_direct_irq_sanity_check(vg, i, value)) {
1494 } else if ((value & BYT_PIN_MUX) == byt_get_gpio_mux(vg, i)) {
1495 byt_gpio_clear_triggering(vg, i);
1496 dev_dbg(vg->dev, "disabling GPIO %d\n", i);
1503 struct intel_pinctrl *vg = gpiochip_get_data(chip);
1508 for (base = 0; base < vg->soc->npins; base += 32) {
1509 reg = byt_gpio_reg(vg, base, BYT_INT_STAT_REG);
1512 dev_warn(vg->dev, "Pin %i: can't retrieve INT_STAT%u\n", base / 32, base);
1521 dev_err(vg->dev,
1531 struct intel_pinctrl *vg = gpiochip_get_data(chip);
1532 struct device *dev = vg->dev;
1535 ret = gpiochip_add_pin_range(chip, dev_name(dev), 0, 0, vg->soc->npins);
1542 static int byt_gpio_probe(struct intel_pinctrl *vg)
1544 struct platform_device *pdev = to_platform_device(vg->dev);
1549 vg->chip = byt_gpio_chip;
1550 gc = &vg->chip;
1551 gc->label = dev_name(vg->dev);
1555 gc->parent = vg->dev;
1556 gc->ngpio = vg->soc->npins;
1559 vg->context.pads = devm_kcalloc(vg->dev, gc->ngpio, sizeof(*vg->context.pads),
1561 if (!vg->context.pads)
1576 girq->parents = devm_kcalloc(vg->dev, girq->num_parents,
1585 ret = devm_gpiochip_add_data(vg->dev, gc, vg);
1587 dev_err(vg->dev, "failed adding byt-gpio chip\n");
1594 static int byt_set_soc_data(struct intel_pinctrl *vg,
1597 struct platform_device *pdev = to_platform_device(vg->dev);
1600 vg->soc = soc;
1602 vg->ncommunities = vg->soc->ncommunities;
1603 vg->communities = devm_kcalloc(vg->dev, vg->ncommunities,
1604 sizeof(*vg->communities), GFP_KERNEL);
1605 if (!vg->communities)
1608 for (i = 0; i < vg->soc->ncommunities; i++) {
1609 struct intel_community *comm = vg->communities + i;
1611 *comm = vg->soc->communities[i];
1631 struct intel_pinctrl *vg;
1638 vg = devm_kzalloc(dev, sizeof(*vg), GFP_KERNEL);
1639 if (!vg)
1642 vg->dev = dev;
1643 ret = byt_set_soc_data(vg, soc_data);
1649 vg->pctldesc = byt_pinctrl_desc;
1650 vg->pctldesc.name = dev_name(dev);
1651 vg->pctldesc.pins = vg->soc->pins;
1652 vg->pctldesc.npins = vg->soc->npins;
1654 vg->pctldev = devm_pinctrl_register(dev, &vg->pctldesc, vg);
1655 if (IS_ERR(vg->pctldev)) {
1657 return PTR_ERR(vg->pctldev);
1660 ret = byt_gpio_probe(vg);
1664 platform_set_drvdata(pdev, vg);
1672 struct intel_pinctrl *vg = dev_get_drvdata(dev);
1678 for (i = 0; i < vg->soc->npins; i++) {
1681 unsigned int pin = vg->soc->pins[i].number;
1683 reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG);
1685 dev_warn(vg->dev, "Pin %i: can't retrieve CONF0\n", i);
1689 vg->context.pads[i].conf0 = value;
1691 reg = byt_gpio_reg(vg, pin, BYT_VAL_REG);
1693 dev_warn(vg->dev, "Pin %i: can't retrieve VAL\n", i);
1697 vg->context.pads[i].val = value;
1706 struct intel_pinctrl *vg = dev_get_drvdata(dev);
1712 for (i = 0; i < vg->soc->npins; i++) {
1715 unsigned int pin = vg->soc->pins[i].number;
1717 reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG);
1719 dev_warn(vg->dev, "Pin %i: can't retrieve CONF0\n", i);
1724 vg->context.pads[i].conf0) {
1726 value |= vg->context.pads[i].conf0;
1731 reg = byt_gpio_reg(vg, pin, BYT_VAL_REG);
1733 dev_warn(vg->dev, "Pin %i: can't retrieve VAL\n", i);
1738 vg->context.pads[i].val) {
1742 v |= vg->context.pads[i].val;