Lines Matching refs:pins
10 * The ASPEED SoCs provide typically more than 200 pins for GPIO and other
56 * bit in the STRAP register. The ACPI bit configures signals on pins in
106 * Other video-input-related pins require an explicit state in SCU90[5:4], e.g.
144 * pins in the function's group to disable the higher-priority signals such
148 * it 18 pins of five priority levels, however the 18 pins only use three of
151 * Ultimately the requirement to control pins in the examples above drive the
217 * concern for the function of already allocated pins, if pin groups are
221 * Conversely, failing to allocate all pins in a group indicates some bits (as
222 * well as pins) required for the group's configuration will already be in use,
234 * The complexity of configuring the mux combined with the scale of the pins
311 * .pins = &(group_pins_MAC1LINK)[0],
601 * list with a single expression (SE) and a single group (SG) of pins.
619 * Similar to the above, but for pins with a single expression (SE) and
620 * multiple groups (MG) of pins.
635 * Similar to the above, but for pins with a dual expressions (DE)
636 * and a single group (SG) of pins.
764 const unsigned int *pins;
770 .pins = &(GROUP_SYM(name_))[0], \