Lines Matching defs:gtr_phy
275 static inline u32 xpsgtr_read_phy(struct xpsgtr_phy *gtr_phy, u32 reg)
277 void __iomem *addr = gtr_phy->dev->serdes
278 + gtr_phy->lane * PHY_REG_OFFSET + reg;
283 static inline void xpsgtr_write_phy(struct xpsgtr_phy *gtr_phy,
286 void __iomem *addr = gtr_phy->dev->serdes
287 + gtr_phy->lane * PHY_REG_OFFSET + reg;
292 static inline void xpsgtr_clr_set_phy(struct xpsgtr_phy *gtr_phy,
295 void __iomem *addr = gtr_phy->dev->serdes
296 + gtr_phy->lane * PHY_REG_OFFSET + reg;
308 struct xpsgtr_phy *gtr_phy = phy_get_drvdata(phy);
309 struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
316 u32 reg = xpsgtr_read_phy(gtr_phy, L0_PLL_STATUS_READ_1);
334 gtr_phy->lane, gtr_phy->type, gtr_phy->protocol);
340 static void xpsgtr_configure_pll(struct xpsgtr_phy *gtr_phy)
345 ssc = gtr_phy->dev->refclk_sscs[gtr_phy->refclk];
348 xpsgtr_clr_set(gtr_phy->dev, PLL_REF_SEL(gtr_phy->lane),
352 if (gtr_phy->refclk != gtr_phy->lane) {
354 xpsgtr_clr_set(gtr_phy->dev, L0_Ln_REF_CLK_SEL(gtr_phy->lane),
355 L0_REF_CLK_SEL_MASK, 1 << gtr_phy->refclk);
359 xpsgtr_clr_set_phy(gtr_phy, L0_PLL_SS_STEP_SIZE_0_LSB,
364 xpsgtr_clr_set_phy(gtr_phy, L0_PLL_SS_STEP_SIZE_1,
369 xpsgtr_clr_set_phy(gtr_phy, L0_PLL_SS_STEP_SIZE_2,
373 xpsgtr_clr_set_phy(gtr_phy, L0_PLL_SS_STEPS_0_LSB,
377 xpsgtr_clr_set_phy(gtr_phy, L0_PLL_SS_STEPS_1_MSB,
383 xpsgtr_clr_set_phy(gtr_phy, L0_PLL_SS_STEP_SIZE_3_MSB,
389 static void xpsgtr_lane_set_protocol(struct xpsgtr_phy *gtr_phy)
391 struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
392 u8 protocol = gtr_phy->protocol;
394 switch (gtr_phy->lane) {
416 static void xpsgtr_bypass_scrambler_8b10b(struct xpsgtr_phy *gtr_phy)
418 xpsgtr_write_phy(gtr_phy, L0_TM_DIG_6, L0_TM_DIS_DESCRAMBLE_DECODER);
419 xpsgtr_write_phy(gtr_phy, L0_TX_DIG_61, L0_TM_DISABLE_SCRAMBLE_ENCODER);
423 static void xpsgtr_phy_init_dp(struct xpsgtr_phy *gtr_phy)
425 xpsgtr_write_phy(gtr_phy, L0_TXPMD_TM_45,
431 xpsgtr_write_phy(gtr_phy, L0_TX_ANA_TM_118,
436 static void xpsgtr_phy_init_sata(struct xpsgtr_phy *gtr_phy)
438 struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
440 xpsgtr_bypass_scrambler_8b10b(gtr_phy);
442 writel(gtr_phy->lane, gtr_dev->siou + SATA_CONTROL_OFFSET);
446 static void xpsgtr_phy_init_sgmii(struct xpsgtr_phy *gtr_phy)
448 struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
449 u32 mask = PROT_BUS_WIDTH_MASK(gtr_phy->lane);
450 u32 val = PROT_BUS_WIDTH_10 << PROT_BUS_WIDTH_SHIFT(gtr_phy->lane);
456 xpsgtr_bypass_scrambler_8b10b(gtr_phy);
460 static void xpsgtr_phy_configure_dp(struct xpsgtr_phy *gtr_phy, unsigned int pre,
476 xpsgtr_write_phy(gtr_phy, L0_TXPMD_TM_48, voltage_swing[pre][voltage]);
477 xpsgtr_write_phy(gtr_phy, L0_TX_ANA_TM_18, pre_emphasis[pre][voltage]);
484 static bool xpsgtr_phy_init_required(struct xpsgtr_phy *gtr_phy)
490 * except when gtr_phy->skip_phy_init is false (this happens when FPD is
493 if (gtr_phy->protocol == ICM_PROTOCOL_USB && gtr_phy->skip_phy_init)
504 static int xpsgtr_phy_tx_term_fix(struct xpsgtr_phy *gtr_phy)
506 struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
524 xpsgtr_lane_set_protocol(gtr_phy);
569 struct xpsgtr_phy *gtr_phy = phy_get_drvdata(phy);
570 struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
576 if (clk_prepare_enable(gtr_dev->clk[gtr_phy->lane]))
580 if (!xpsgtr_phy_init_required(gtr_phy))
584 ret = xpsgtr_phy_tx_term_fix(gtr_phy);
592 xpsgtr_write_phy(gtr_phy, L0_TM_PLL_DIG_37, L0_TM_COARSE_CODE_LIMIT);
598 xpsgtr_configure_pll(gtr_phy);
599 xpsgtr_lane_set_protocol(gtr_phy);
601 switch (gtr_phy->protocol) {
603 xpsgtr_phy_init_dp(gtr_phy);
607 xpsgtr_phy_init_sata(gtr_phy);
611 xpsgtr_phy_init_sgmii(gtr_phy);
622 struct xpsgtr_phy *gtr_phy = phy_get_drvdata(phy);
623 struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
625 gtr_phy->skip_phy_init = false;
628 clk_disable_unprepare(gtr_dev->clk[gtr_phy->lane]);
635 struct xpsgtr_phy *gtr_phy = phy_get_drvdata(phy);
639 if (!xpsgtr_phy_init_required(gtr_phy))
646 if (gtr_phy->protocol != ICM_PROTOCOL_DP ||
647 gtr_phy->type == XPSGTR_TYPE_DP_0)
655 struct xpsgtr_phy *gtr_phy = phy_get_drvdata(phy);
657 if (gtr_phy->protocol != ICM_PROTOCOL_DP)
660 xpsgtr_phy_configure_dp(gtr_phy, opts->dp.pre[0], opts->dp.voltage[0]);
678 static int xpsgtr_set_lane_type(struct xpsgtr_phy *gtr_phy, u8 phy_type,
693 gtr_phy->protocol = ICM_PROTOCOL_SATA;
704 gtr_phy->protocol = ICM_PROTOCOL_USB;
715 gtr_phy->protocol = ICM_PROTOCOL_DP;
728 gtr_phy->protocol = ICM_PROTOCOL_PCIE;
741 gtr_phy->protocol = ICM_PROTOCOL_SGMII;
751 gtr_phy->type = phy_types[phy_instance];
774 struct xpsgtr_phy *gtr_phy;
797 gtr_phy = >r_dev->phys[phy_lane];
801 ret = xpsgtr_set_lane_type(gtr_phy, phy_type, phy_instance);
814 gtr_phy->refclk = refclk;
821 if (icm_matrix[phy_lane][i] == gtr_phy->type)
822 return gtr_phy->phy;
864 /* Update the skip_phy_init for all gtr_phy instances. */
963 struct xpsgtr_phy *gtr_phy = >r_dev->phys[port];
966 gtr_phy->lane = port;
967 gtr_phy->dev = gtr_dev;
975 gtr_phy->phy = phy;
976 phy_set_drvdata(phy, gtr_phy);