Lines Matching refs:index
289 unsigned int index)
295 port = tegra_xusb_find_usb3_port(padctl, index);
303 offset = XUSB_PADCTL_IOPHY_MISC_PAD_PX_CTL6(lane->index);
329 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_USB3_PADX_CTL4(index));
338 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_USB3_PADX_CTL4(index));
371 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_USB3_PADX_CTL2(index));
380 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_USB3_PADX_CTL2(index));
386 unsigned int index, bool idle)
390 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL1(index));
399 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL1(index));
428 unsigned int index)
438 usb2->base.soc = &pad->soc->lanes[index];
439 usb2->base.index = index;
486 unsigned int index = lane->index;
490 port = tegra_xusb_find_usb2_port(padctl, index);
492 dev_err(&phy->dev, "no port found for USB2 lane %u\n", index);
511 XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_SHIFT(index));
513 XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_SHIFT(index);
516 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));
526 value |= (priv->fuse.hs_curr_level[index] +
531 value |= XUSB_PADCTL_USB2_OTG_PAD_CTL0_LS_RSLEW_VAL(index) <<
533 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));
535 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));
547 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));
575 port = tegra_xusb_find_usb2_port(padctl, lane->index);
578 lane->index);
677 unsigned int index)
687 ulpi->base.soc = &pad->soc->lanes[index];
688 ulpi->base.index = index;
813 unsigned int index)
823 hsic->base.soc = &pad->soc->lanes[index];
824 hsic->base.index = index;
869 unsigned int index = lane->index;
880 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL1(index));
887 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL1(index));
889 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL0(index));
906 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL0(index));
908 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL2(index));
917 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL2(index));
919 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL1(index));
928 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL1(index));
938 unsigned int index = lane->index;
941 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL1(index));
946 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL1(index));
1033 unsigned int index)
1043 pcie->base.soc = &pad->soc->lanes[index];
1044 pcie->base.index = index;
1118 value |= XUSB_PADCTL_USB3_PAD_MUX_PCIE_IDDQ_DISABLE(lane->index);
1131 value &= ~XUSB_PADCTL_USB3_PAD_MUX_PCIE_IDDQ_DISABLE(lane->index);
1211 unsigned int index)
1221 sata->base.soc = &pad->soc->lanes[index];
1222 sata->base.index = index;
1300 value |= XUSB_PADCTL_USB3_PAD_MUX_SATA_IDDQ_DISABLE(lane->index);
1313 value &= ~XUSB_PADCTL_USB3_PAD_MUX_SATA_IDDQ_DISABLE(lane->index);
1421 return tegra_xusb_find_lane(port->padctl, "usb2", port->index);
1444 return tegra_xusb_find_lane(port->padctl, "ulpi", port->index);
1466 return tegra_xusb_find_lane(port->padctl, "hsic", port->index);
1481 unsigned int index = port->index, offset;
1487 value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(index);
1489 value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(index);
1491 value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP_MASK(index);
1492 value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP(index, usb3->port);
1500 value = padctl_readl(padctl, XUSB_PADCTL_IOPHY_USB3_PADX_CTL2(index));
1525 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_USB3_PADX_CTL2(index));
1540 padctl_writel(padctl, value, XUSB_PADCTL_IOPHY_USB3_PADX_CTL4(index));
1543 offset = XUSB_PADCTL_IOPHY_MISC_PAD_PX_CTL2(lane->index);
1555 offset = XUSB_PADCTL_IOPHY_MISC_PAD_PX_CTL5(lane->index);
1595 value &= ~XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_VCORE_DOWN(index);
1601 value &= ~XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN_EARLY(index);
1607 value &= ~XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN(index);
1619 value |= XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN_EARLY(port->index);
1625 value |= XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN(port->index);
1631 value |= XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_VCORE_DOWN(port->index);
1635 value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP_MASK(port->index);
1636 value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP(port->index, 0x7);