Lines Matching defs:dphy
80 struct stf_dphy *dphy = phy_get_drvdata(phy);
81 const struct stf_dphy_info *info = dphy->info;
93 dphy->regs + STF_DPHY_APBCFGSAIF_SYSCFG(188));
98 dphy->regs + STF_DPHY_APBCFGSAIF_SYSCFG(192));
104 dphy->regs + STF_DPHY_APBCFGSAIF_SYSCFG(196));
107 dphy->regs + STF_DPHY_APBCFGSAIF_SYSCFG(200));
114 struct stf_dphy *dphy = phy_get_drvdata(phy);
117 ret = pm_runtime_resume_and_get(dphy->dev);
121 ret = regulator_enable(dphy->mipi_0p9);
123 pm_runtime_put(dphy->dev);
127 clk_set_rate(dphy->cfg_clk, 99000000);
128 clk_set_rate(dphy->ref_clk, 49500000);
129 clk_set_rate(dphy->tx_clk, 19800000);
130 reset_control_deassert(dphy->rstc);
137 struct stf_dphy *dphy = phy_get_drvdata(phy);
139 reset_control_assert(dphy->rstc);
141 regulator_disable(dphy->mipi_0p9);
143 pm_runtime_put_sync(dphy->dev);
157 struct stf_dphy *dphy;
159 dphy = devm_kzalloc(&pdev->dev, sizeof(*dphy), GFP_KERNEL);
160 if (!dphy)
163 dphy->info = of_device_get_match_data(&pdev->dev);
165 dev_set_drvdata(&pdev->dev, dphy);
166 dphy->dev = &pdev->dev;
168 dphy->regs = devm_platform_ioremap_resource(pdev, 0);
169 if (IS_ERR(dphy->regs))
170 return PTR_ERR(dphy->regs);
172 dphy->cfg_clk = devm_clk_get(&pdev->dev, "cfg");
173 if (IS_ERR(dphy->cfg_clk))
174 return PTR_ERR(dphy->cfg_clk);
176 dphy->ref_clk = devm_clk_get(&pdev->dev, "ref");
177 if (IS_ERR(dphy->ref_clk))
178 return PTR_ERR(dphy->ref_clk);
180 dphy->tx_clk = devm_clk_get(&pdev->dev, "tx");
181 if (IS_ERR(dphy->tx_clk))
182 return PTR_ERR(dphy->tx_clk);
184 dphy->rstc = devm_reset_control_array_get_exclusive(&pdev->dev);
185 if (IS_ERR(dphy->rstc))
186 return PTR_ERR(dphy->rstc);
188 dphy->mipi_0p9 = devm_regulator_get(&pdev->dev, "mipi_0p9");
189 if (IS_ERR(dphy->mipi_0p9))
190 return PTR_ERR(dphy->mipi_0p9);
192 dphy->phy = devm_phy_create(&pdev->dev, NULL, &stf_dphy_ops);
193 if (IS_ERR(dphy->phy)) {
195 return PTR_ERR(dphy->phy);
200 phy_set_drvdata(dphy->phy, dphy);
213 .compatible = "starfive,jh7110-dphy-rx",
223 .name = "starfive-dphy-rx",