Lines Matching refs:sata_phy
71 struct exynos_sata_phy *sata_phy = phy_get_drvdata(phy);
73 return regmap_update_bits(sata_phy->pmureg, SATAPHY_CONTROL_OFFSET,
80 struct exynos_sata_phy *sata_phy = phy_get_drvdata(phy);
82 return regmap_update_bits(sata_phy->pmureg, SATAPHY_CONTROL_OFFSET,
92 struct exynos_sata_phy *sata_phy = phy_get_drvdata(phy);
94 ret = regmap_update_bits(sata_phy->pmureg, SATAPHY_CONTROL_OFFSET,
97 dev_err(&sata_phy->phy->dev, "phy init failed\n");
99 writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);
101 val = readl(sata_phy->regs + EXYNOS5_SATA_RESET);
105 writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);
107 val = readl(sata_phy->regs + EXYNOS5_SATA_RESET);
109 writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);
111 val = readl(sata_phy->regs + EXYNOS5_SATA_RESET);
113 writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);
115 val = readl(sata_phy->regs + EXYNOS5_SATA_PHSATA_CTRLM);
117 writel(val, sata_phy->regs + EXYNOS5_SATA_PHSATA_CTRLM);
120 val = readl(sata_phy->regs + EXYNOS5_SATA_PHSATA_CTRLM);
122 writel(val, sata_phy->regs + EXYNOS5_SATA_PHSATA_CTRLM);
124 val = readl(sata_phy->regs + EXYNOS5_SATA_CTRL0);
126 writel(val, sata_phy->regs + EXYNOS5_SATA_CTRL0);
128 val = readl(sata_phy->regs + EXYNOS5_SATA_MODE0);
130 writel(val, sata_phy->regs + EXYNOS5_SATA_MODE0);
132 ret = i2c_master_send(sata_phy->client, buf, sizeof(buf));
137 val = readl(sata_phy->regs + EXYNOS5_SATA_RESET);
139 writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);
141 val = readl(sata_phy->regs + EXYNOS5_SATA_RESET);
143 writel(val, sata_phy->regs + EXYNOS5_SATA_RESET);
145 ret = wait_for_reg_status(sata_phy->regs,
149 dev_err(&sata_phy->phy->dev,
163 struct exynos_sata_phy *sata_phy;
169 sata_phy = devm_kzalloc(dev, sizeof(*sata_phy), GFP_KERNEL);
170 if (!sata_phy)
173 sata_phy->regs = devm_platform_ioremap_resource(pdev, 0);
174 if (IS_ERR(sata_phy->regs))
175 return PTR_ERR(sata_phy->regs);
177 sata_phy->pmureg = syscon_regmap_lookup_by_phandle(dev->of_node,
179 if (IS_ERR(sata_phy->pmureg)) {
181 return PTR_ERR(sata_phy->pmureg);
189 sata_phy->client = of_find_i2c_device_by_node(node);
191 if (!sata_phy->client)
194 dev_set_drvdata(dev, sata_phy);
196 sata_phy->phyclk = devm_clk_get(dev, "sata_phyctrl");
197 if (IS_ERR(sata_phy->phyclk)) {
199 ret = PTR_ERR(sata_phy->phyclk);
203 ret = clk_prepare_enable(sata_phy->phyclk);
209 sata_phy->phy = devm_phy_create(dev, NULL, &exynos_sata_phy_ops);
210 if (IS_ERR(sata_phy->phy)) {
212 ret = PTR_ERR(sata_phy->phy);
216 phy_set_drvdata(sata_phy->phy, sata_phy);
228 clk_disable_unprepare(sata_phy->phyclk);
230 put_device(&sata_phy->client->dev);