Lines Matching refs:reg_phy
206 * @reg_phy: usb phy controller register memory base
223 void __iomem *reg_phy;
315 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST);
361 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST);
378 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1);
382 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1);
384 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST);
386 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST);
393 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM0);
397 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM0);
399 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1);
403 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1);
406 writel(PHYUTMI_OTGDISABLE, phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMI);
408 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST);
410 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST);
425 writel(0x0, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0);
426 writel(0x0, phy_drd->reg_phy + EXYNOS5_DRD_PHYRESUME);
434 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_LINKSYSTEM);
436 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM0);
439 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM0);
442 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMICLKSEL);
444 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMICLKSEL);
463 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST);
468 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST);
489 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMI);
492 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST);
496 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST);
499 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST);
502 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST);
594 writel(val | cmd, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0);
596 err = readl_poll_timeout(phy_drd->reg_phy + EXYNOS5_DRD_PHYREG1,
603 writel(val, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0);
605 err = readl_poll_timeout(phy_drd->reg_phy + EXYNOS5_DRD_PHYREG1,
622 phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0);
630 phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0);
749 void __iomem *regs_base = phy_drd->reg_phy;
830 void __iomem *regs_base = phy_drd->reg_phy;
1021 phy_drd->reg_phy = devm_platform_ioremap_resource(pdev, 0);
1022 if (IS_ERR(phy_drd->reg_phy))
1023 return PTR_ERR(phy_drd->reg_phy);