Lines Matching refs:rphy
176 int (*phy_tuning)(struct rockchip_usb2phy *rphy);
258 static inline struct regmap *get_reg_base(struct rockchip_usb2phy *rphy)
260 return rphy->usbgrf == NULL ? rphy->grf : rphy->usbgrf;
290 static int rockchip_usb2phy_reset(struct rockchip_usb2phy *rphy)
294 ret = reset_control_assert(rphy->phy_reset);
300 ret = reset_control_deassert(rphy->phy_reset);
311 struct rockchip_usb2phy *rphy =
313 struct regmap *base = get_reg_base(rphy);
317 if (!property_enabled(base, &rphy->phy_cfg->clkout_ctl)) {
318 ret = property_enable(base, &rphy->phy_cfg->clkout_ctl, true);
331 struct rockchip_usb2phy *rphy =
333 struct regmap *base = get_reg_base(rphy);
336 property_enable(base, &rphy->phy_cfg->clkout_ctl, false);
341 struct rockchip_usb2phy *rphy =
343 struct regmap *base = get_reg_base(rphy);
345 return property_enabled(base, &rphy->phy_cfg->clkout_ctl);
364 struct rockchip_usb2phy *rphy = data;
366 of_clk_del_provider(rphy->dev->of_node);
367 clk_unregister(rphy->clk480m);
371 rockchip_usb2phy_clk480m_register(struct rockchip_usb2phy *rphy)
373 struct device_node *node = rphy->dev->of_node;
385 if (rphy->clk) {
386 clk_name = __clk_get_name(rphy->clk);
394 rphy->clk480m_hw.init = &init;
397 rphy->clk480m = clk_register(rphy->dev, &rphy->clk480m_hw);
398 if (IS_ERR(rphy->clk480m)) {
399 ret = PTR_ERR(rphy->clk480m);
403 ret = of_clk_add_provider(node, of_clk_src_simple_get, rphy->clk480m);
407 return devm_add_action_or_reset(rphy->dev, rockchip_usb2phy_clk480m_unregister, rphy);
410 clk_unregister(rphy->clk480m);
415 static int rockchip_usb2phy_extcon_register(struct rockchip_usb2phy *rphy)
418 struct device_node *node = rphy->dev->of_node;
422 edev = extcon_get_edev_by_phandle(rphy->dev, 0);
425 dev_err(rphy->dev, "Invalid or missing extcon\n");
430 edev = devm_extcon_dev_allocate(rphy->dev,
436 ret = devm_extcon_dev_register(rphy->dev, edev);
438 dev_err(rphy->dev, "failed to register extcon device\n");
443 rphy->edev = edev;
448 static int rockchip_usb2phy_enable_host_disc_irq(struct rockchip_usb2phy *rphy,
454 ret = property_enable(rphy->grf, &rport->port_cfg->disfall_clr, true);
458 ret = property_enable(rphy->grf, &rport->port_cfg->disfall_en, en);
462 ret = property_enable(rphy->grf, &rport->port_cfg->disrise_clr, true);
466 return property_enable(rphy->grf, &rport->port_cfg->disrise_en, en);
472 struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent);
481 ret = property_enable(rphy->grf,
487 ret = property_enable(rphy->grf,
494 ret = property_enable(rphy->grf,
500 ret = property_enable(rphy->grf,
515 ret = rockchip_usb2phy_enable_host_disc_irq(rphy, rport, true);
517 dev_err(rphy->dev, "failed to enable disconnect irq\n");
523 ret = property_enable(rphy->grf,
528 ret = property_enable(rphy->grf,
544 struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent);
545 struct regmap *base = get_reg_base(rphy);
553 ret = clk_prepare_enable(rphy->clk480m);
559 clk_disable_unprepare(rphy->clk480m);
571 ret = rockchip_usb2phy_reset(rphy);
585 struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent);
586 struct regmap *base = get_reg_base(rphy);
599 clk_disable_unprepare(rphy->clk480m);
632 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
637 vbus_attach = property_enabled(rphy->grf,
653 if (extcon_get_state(rphy->edev, EXTCON_USB_HOST) > 0) {
660 switch (rphy->chg_state) {
665 switch (rphy->chg_type) {
698 rphy->chg_state = USB_CHG_STATE_UNDEFINED;
699 rphy->chg_type = POWER_SUPPLY_TYPE_UNKNOWN;
705 if (notify_charger && rphy->edev) {
706 extcon_set_state_sync(rphy->edev,
709 extcon_set_state_sync(rphy->edev,
718 rphy->chg_state = USB_CHG_STATE_UNDEFINED;
719 rphy->chg_type = POWER_SUPPLY_TYPE_UNKNOWN;
727 if (extcon_get_state(rphy->edev, EXTCON_USB_HOST) == 0) {
755 static void rockchip_chg_enable_dcd(struct rockchip_usb2phy *rphy,
758 struct regmap *base = get_reg_base(rphy);
760 property_enable(base, &rphy->phy_cfg->chg_det.rdm_pdwn_en, en);
761 property_enable(base, &rphy->phy_cfg->chg_det.idp_src_en, en);
764 static void rockchip_chg_enable_primary_det(struct rockchip_usb2phy *rphy,
767 struct regmap *base = get_reg_base(rphy);
769 property_enable(base, &rphy->phy_cfg->chg_det.vdp_src_en, en);
770 property_enable(base, &rphy->phy_cfg->chg_det.idm_sink_en, en);
773 static void rockchip_chg_enable_secondary_det(struct rockchip_usb2phy *rphy,
776 struct regmap *base = get_reg_base(rphy);
778 property_enable(base, &rphy->phy_cfg->chg_det.vdm_src_en, en);
779 property_enable(base, &rphy->phy_cfg->chg_det.idp_sink_en, en);
790 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
791 struct regmap *base = get_reg_base(rphy);
796 rphy->chg_state);
797 switch (rphy->chg_state) {
802 property_enable(base, &rphy->phy_cfg->chg_det.opmode, false);
804 rockchip_chg_enable_dcd(rphy, true);
805 rphy->chg_state = USB_CHG_STATE_WAIT_FOR_DCD;
806 rphy->dcd_retries = 0;
811 is_dcd = property_enabled(rphy->grf,
812 &rphy->phy_cfg->chg_det.dp_det);
813 tmout = ++rphy->dcd_retries == CHG_DCD_MAX_RETRIES;
818 rockchip_chg_enable_dcd(rphy, false);
820 rockchip_chg_enable_primary_det(rphy, true);
822 rphy->chg_state = USB_CHG_STATE_DCD_DONE;
829 vout = property_enabled(rphy->grf,
830 &rphy->phy_cfg->chg_det.cp_det);
831 rockchip_chg_enable_primary_det(rphy, false);
834 rockchip_chg_enable_secondary_det(rphy, true);
836 rphy->chg_state = USB_CHG_STATE_PRIMARY_DONE;
838 if (rphy->dcd_retries == CHG_DCD_MAX_RETRIES) {
840 rphy->chg_type = POWER_SUPPLY_TYPE_USB_DCP;
841 rphy->chg_state = USB_CHG_STATE_DETECTED;
844 rphy->chg_type = POWER_SUPPLY_TYPE_USB;
845 rphy->chg_state = USB_CHG_STATE_DETECTED;
851 vout = property_enabled(rphy->grf,
852 &rphy->phy_cfg->chg_det.dcp_det);
854 rockchip_chg_enable_secondary_det(rphy, false);
856 rphy->chg_type = POWER_SUPPLY_TYPE_USB_DCP;
858 rphy->chg_type = POWER_SUPPLY_TYPE_USB_CDP;
861 rphy->chg_state = USB_CHG_STATE_DETECTED;
865 property_enable(base, &rphy->phy_cfg->chg_det.opmode, true);
868 chg_to_string(rphy->chg_type));
894 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
901 ret = regmap_read(rphy->grf, rport->port_cfg->utmi_ls.offset, &ul);
909 ret = regmap_read(rphy->grf, rport->port_cfg->utmi_hstdet.offset, &uhd);
967 property_enable(rphy->grf, &rport->port_cfg->ls_det_clr, true);
968 property_enable(rphy->grf, &rport->port_cfg->ls_det_en, true);
989 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
991 if (!property_enabled(rphy->grf, &rport->port_cfg->ls_det_st))
997 property_enable(rphy->grf, &rport->port_cfg->ls_det_en, false);
998 property_enable(rphy->grf, &rport->port_cfg->ls_det_clr, true);
1016 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
1018 if (!property_enabled(rphy->grf, &rport->port_cfg->bvalid_det_st))
1022 property_enable(rphy->grf, &rport->port_cfg->bvalid_det_clr, true);
1032 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
1035 if (!property_enabled(rphy->grf, &rport->port_cfg->id_det_st))
1039 property_enable(rphy->grf, &rport->port_cfg->id_det_clr, true);
1041 id = property_enabled(rphy->grf, &rport->port_cfg->utmi_id);
1042 extcon_set_state_sync(rphy->edev, EXTCON_USB_HOST, !id);
1060 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
1062 if (!property_enabled(rphy->grf, &rport->port_cfg->disfall_st) &&
1063 !property_enabled(rphy->grf, &rport->port_cfg->disrise_st))
1069 if (property_enabled(rphy->grf, &rport->port_cfg->disfall_st)) {
1070 property_enable(rphy->grf, &rport->port_cfg->disfall_clr, true);
1072 } else if (property_enabled(rphy->grf, &rport->port_cfg->disrise_st)) {
1073 property_enable(rphy->grf, &rport->port_cfg->disrise_clr, true);
1084 struct rockchip_usb2phy *rphy = data;
1089 for (index = 0; index < rphy->phy_cfg->num_ports; index++) {
1090 rport = &rphy->ports[index];
1113 static int rockchip_usb2phy_port_irq_init(struct rockchip_usb2phy *rphy,
1123 if (rphy->irq > 0)
1130 dev_err(rphy->dev, "no linestate irq provided\n");
1134 ret = devm_request_threaded_irq(rphy->dev, rport->ls_irq, NULL,
1139 dev_err(rphy->dev, "failed to request linestate irq handle\n");
1151 ret = devm_request_threaded_irq(rphy->dev, rport->otg_mux_irq,
1158 dev_err(rphy->dev,
1165 dev_err(rphy->dev, "no vbus valid irq provided\n");
1170 ret = devm_request_threaded_irq(rphy->dev, rport->bvalid_irq,
1177 dev_err(rphy->dev,
1184 dev_err(rphy->dev, "no otg-id irq provided\n");
1189 ret = devm_request_threaded_irq(rphy->dev, rport->id_irq,
1196 dev_err(rphy->dev,
1209 static int rockchip_usb2phy_host_port_init(struct rockchip_usb2phy *rphy,
1216 rport->port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_HOST];
1222 ret = rockchip_usb2phy_port_irq_init(rphy, rport, child_np);
1224 dev_err(rphy->dev, "failed to setup host irq\n");
1242 static int rockchip_usb2phy_otg_port_init(struct rockchip_usb2phy *rphy,
1249 rport->port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
1273 ret = rockchip_usb2phy_port_irq_init(rphy, rport, child_np);
1275 dev_err(rphy->dev, "failed to init irq for host port\n");
1279 if (!IS_ERR(rphy->edev)) {
1282 ret = devm_extcon_register_notifier(rphy->dev, rphy->edev,
1285 dev_err(rphy->dev, "register USB HOST notifier failed\n");
1289 if (!of_property_read_bool(rphy->dev->of_node, "extcon")) {
1291 id = property_enabled(rphy->grf, &rport->port_cfg->utmi_id);
1292 extcon_set_state_sync(rphy->edev, EXTCON_USB_HOST, !id);
1306 struct rockchip_usb2phy *rphy;
1311 rphy = devm_kzalloc(dev, sizeof(*rphy), GFP_KERNEL);
1312 if (!rphy)
1316 rphy->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,usbgrf");
1317 if (IS_ERR(rphy->grf)) {
1319 return PTR_ERR(rphy->grf);
1324 rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
1325 if (IS_ERR(rphy->grf))
1326 return PTR_ERR(rphy->grf);
1330 rphy->usbgrf =
1333 if (IS_ERR(rphy->usbgrf))
1334 return PTR_ERR(rphy->usbgrf);
1336 rphy->usbgrf = NULL;
1354 rphy->dev = dev;
1356 rphy->chg_state = USB_CHG_STATE_UNDEFINED;
1357 rphy->chg_type = POWER_SUPPLY_TYPE_UNKNOWN;
1358 rphy->irq = platform_get_irq_optional(pdev, 0);
1359 platform_set_drvdata(pdev, rphy);
1364 ret = rockchip_usb2phy_extcon_register(rphy);
1372 rphy->phy_cfg = &phy_cfgs[index];
1379 if (!rphy->phy_cfg) {
1384 rphy->phy_reset = devm_reset_control_get_optional(dev, "phy");
1385 if (IS_ERR(rphy->phy_reset))
1386 return PTR_ERR(rphy->phy_reset);
1388 rphy->clk = devm_clk_get_optional_enabled(dev, "phyclk");
1389 if (IS_ERR(rphy->clk)) {
1390 return dev_err_probe(&pdev->dev, PTR_ERR(rphy->clk),
1394 ret = rockchip_usb2phy_clk480m_register(rphy);
1400 if (rphy->phy_cfg->phy_tuning) {
1401 ret = rphy->phy_cfg->phy_tuning(rphy);
1408 struct rockchip_usb2phy_port *rport = &rphy->ports[index];
1428 ret = rockchip_usb2phy_host_port_init(rphy, rport,
1433 ret = rockchip_usb2phy_otg_port_init(rphy, rport,
1441 if (++index >= rphy->phy_cfg->num_ports) {
1449 if (rphy->irq > 0) {
1450 ret = devm_request_threaded_irq(rphy->dev, rphy->irq, NULL,
1454 rphy);
1456 dev_err(rphy->dev,
1469 static int rk3588_usb2phy_tuning(struct rockchip_usb2phy *rphy)
1479 if (rphy->phy_cfg->reg == 0x0000 || rphy->phy_cfg->reg == 0x4000) {
1483 } else if (rphy->phy_cfg->reg == 0x8000 || rphy->phy_cfg->reg == 0xc000) {
1491 ret = regmap_write(rphy->grf, 0x0008, GENMASK(29, 29) | 0x0000);
1496 ret = rockchip_usb2phy_reset(rphy);
1501 ret |= regmap_write(rphy->grf, 0x000c, GENMASK(20, 16) | suspend_cfg);
1504 ret |= regmap_write(rphy->grf, 0x0004, GENMASK(27, 24) | 0x0900);
1507 ret |= regmap_write(rphy->grf, 0x0008, GENMASK(20, 19) | 0x0010);
1513 ret |= regmap_write(rphy->grf, 0x0010, GENMASK(17, 16) | 0x0003);