Lines Matching refs:ret
35 int ret;
38 ret = regmap_write(dp->grf, GRF_SOC_CON12,
41 if (ret < 0) {
42 dev_err(dp->dev, "Can't enable PHY power %d\n", ret);
43 return ret;
46 ret = clk_prepare_enable(dp->phy_24m);
50 ret = regmap_write(dp->grf, GRF_SOC_CON12,
55 return ret;
81 int ret;
101 ret = clk_set_rate(dp->phy_24m, 24000000);
102 if (ret < 0) {
103 dev_err(dp->dev, "cannot set clock phy_24m %d\n", ret);
104 return ret;
113 ret = regmap_write(dp->grf, GRF_SOC_CON12, GRF_EDP_REF_CLK_SEL_INTER |
115 if (ret != 0) {
116 dev_err(dp->dev, "Could not config GRF edp ref clk: %d\n", ret);
117 return ret;