Lines Matching defs:phy
11 #include <linux/phy/phy.h>
125 struct phy *phy;
135 struct phy *repeater;
138 static int qcom_snps_eusb2_hsphy_set_mode(struct phy *p, enum phy_mode mode, int submode)
140 struct qcom_snps_eusb2_hsphy *phy = phy_get_drvdata(p);
142 phy->mode = mode;
144 return phy_set_mode_ext(phy->repeater, mode, submode);
161 static void qcom_eusb2_default_parameters(struct qcom_snps_eusb2_hsphy *phy)
164 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_9,
169 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_9,
174 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_9,
179 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_8,
184 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_8,
189 static int qcom_eusb2_ref_clk_init(struct qcom_snps_eusb2_hsphy *phy)
191 unsigned long ref_clk_freq = clk_get_rate(phy->ref_clk);
195 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_HS_PHY_CTRL_COMMON0,
199 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_2,
203 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_3,
209 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_HS_PHY_CTRL_COMMON0,
213 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_2,
217 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_3,
223 dev_err(&phy->phy->dev, "unsupported ref_clk_freq:%lu\n", ref_clk_freq);
227 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_3,
233 static int qcom_snps_eusb2_hsphy_init(struct phy *p)
235 struct qcom_snps_eusb2_hsphy *phy = phy_get_drvdata(p);
238 ret = regulator_bulk_enable(ARRAY_SIZE(phy->vregs), phy->vregs);
242 ret = phy_init(phy->repeater);
248 ret = clk_prepare_enable(phy->ref_clk);
254 ret = reset_control_assert(phy->phy_reset);
262 ret = reset_control_deassert(phy->phy_reset);
268 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG0,
271 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_UTMI_CTRL5, POR, POR);
273 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_HS_PHY_CTRL_COMMON0,
276 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_APB_ACCESS_CMD,
279 qcom_snps_eusb2_hsphy_write_mask(phy->base, UTMI_PHY_CMN_CTRL0, TESTBURNIN, 0);
281 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_FSEL_SEL,
285 ret = qcom_eusb2_ref_clk_init(phy);
289 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_1,
293 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_4,
297 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_4,
301 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_5,
305 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_6,
309 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_5,
313 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_HS_PHY_CTRL2,
317 qcom_eusb2_default_parameters(phy);
319 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_HS_PHY_CTRL2,
323 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_UTMI_CTRL0, SLEEPM, SLEEPM);
325 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_HS_PHY_CTRL_COMMON0,
328 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_HS_PHY_CTRL_COMMON0,
331 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_UTMI_CTRL5, POR, 0);
333 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_HS_PHY_CTRL2,
339 clk_disable_unprepare(phy->ref_clk);
342 regulator_bulk_disable(ARRAY_SIZE(phy->vregs), phy->vregs);
347 static int qcom_snps_eusb2_hsphy_exit(struct phy *p)
349 struct qcom_snps_eusb2_hsphy *phy = phy_get_drvdata(p);
351 clk_disable_unprepare(phy->ref_clk);
353 regulator_bulk_disable(ARRAY_SIZE(phy->vregs), phy->vregs);
355 phy_exit(phy->repeater);
371 struct qcom_snps_eusb2_hsphy *phy;
373 struct phy *generic_phy;
377 phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
378 if (!phy)
381 phy->base = devm_platform_ioremap_resource(pdev, 0);
382 if (IS_ERR(phy->base))
383 return PTR_ERR(phy->base);
385 phy->phy_reset = devm_reset_control_get_exclusive(dev, NULL);
386 if (IS_ERR(phy->phy_reset))
387 return PTR_ERR(phy->phy_reset);
389 phy->ref_clk = devm_clk_get(dev, "ref");
390 if (IS_ERR(phy->ref_clk))
391 return dev_err_probe(dev, PTR_ERR(phy->ref_clk),
394 num = ARRAY_SIZE(phy->vregs);
396 phy->vregs[i].supply = eusb2_hsphy_vreg_names[i];
398 ret = devm_regulator_bulk_get(dev, num, phy->vregs);
403 phy->repeater = devm_of_phy_get_by_index(dev, np, 0);
404 if (IS_ERR(phy->repeater))
405 return dev_err_probe(dev, PTR_ERR(phy->repeater),
410 dev_err(dev, "failed to create phy %d\n", ret);
414 dev_set_drvdata(dev, phy);
415 phy_set_drvdata(generic_phy, phy);
421 dev_info(dev, "Registered Qcom-eUSB2 phy\n");
427 { .compatible = "qcom,sm8550-snps-eusb2-phy", },