Lines Matching refs:qmp
23 #include "phy-qcom-qmp.h"
24 #include "phy-qcom-qmp-pcs-ufs-v2.h"
25 #include "phy-qcom-qmp-pcs-ufs-v3.h"
26 #include "phy-qcom-qmp-pcs-ufs-v4.h"
27 #include "phy-qcom-qmp-pcs-ufs-v5.h"
28 #include "phy-qcom-qmp-pcs-ufs-v6.h"
30 #include "phy-qcom-qmp-qserdes-txrx-ufs-v6.h"
1193 static void qmp_ufs_serdes_init(struct qmp_ufs *qmp, const struct qmp_phy_cfg_tbls *tbls)
1195 void __iomem *serdes = qmp->serdes;
1200 static void qmp_ufs_lanes_init(struct qmp_ufs *qmp, const struct qmp_phy_cfg_tbls *tbls)
1202 const struct qmp_phy_cfg *cfg = qmp->cfg;
1203 void __iomem *tx = qmp->tx;
1204 void __iomem *rx = qmp->rx;
1210 qmp_ufs_configure_lane(qmp->tx2, tbls->tx, tbls->tx_num, 2);
1211 qmp_ufs_configure_lane(qmp->rx2, tbls->rx, tbls->rx_num, 2);
1215 static void qmp_ufs_pcs_init(struct qmp_ufs *qmp, const struct qmp_phy_cfg_tbls *tbls)
1217 void __iomem *pcs = qmp->pcs;
1222 static void qmp_ufs_init_registers(struct qmp_ufs *qmp, const struct qmp_phy_cfg *cfg)
1224 qmp_ufs_serdes_init(qmp, &cfg->tbls);
1225 if (qmp->mode == PHY_MODE_UFS_HS_B)
1226 qmp_ufs_serdes_init(qmp, &cfg->tbls_hs_b);
1227 qmp_ufs_lanes_init(qmp, &cfg->tbls);
1228 if (qmp->submode == UFS_HS_G4)
1229 qmp_ufs_lanes_init(qmp, &cfg->tbls_hs_g4);
1230 qmp_ufs_pcs_init(qmp, &cfg->tbls);
1231 if (qmp->submode == UFS_HS_G4)
1232 qmp_ufs_pcs_init(qmp, &cfg->tbls_hs_g4);
1235 static int qmp_ufs_com_init(struct qmp_ufs *qmp)
1237 const struct qmp_phy_cfg *cfg = qmp->cfg;
1238 void __iomem *pcs = qmp->pcs;
1241 ret = regulator_bulk_enable(cfg->num_vregs, qmp->vregs);
1243 dev_err(qmp->dev, "failed to enable regulators, err=%d\n", ret);
1247 ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks);
1256 regulator_bulk_disable(cfg->num_vregs, qmp->vregs);
1261 static int qmp_ufs_com_exit(struct qmp_ufs *qmp)
1263 const struct qmp_phy_cfg *cfg = qmp->cfg;
1265 reset_control_assert(qmp->ufs_reset);
1267 clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
1269 regulator_bulk_disable(cfg->num_vregs, qmp->vregs);
1276 struct qmp_ufs *qmp = phy_get_drvdata(phy);
1277 const struct qmp_phy_cfg *cfg = qmp->cfg;
1279 dev_vdbg(qmp->dev, "Initializing QMP phy\n");
1287 if (!qmp->ufs_reset) {
1288 qmp->ufs_reset =
1289 devm_reset_control_get_exclusive(qmp->dev,
1292 if (IS_ERR(qmp->ufs_reset)) {
1293 ret = PTR_ERR(qmp->ufs_reset);
1294 dev_err(qmp->dev,
1298 qmp->ufs_reset = NULL;
1303 ret = reset_control_assert(qmp->ufs_reset);
1308 ret = qmp_ufs_com_init(qmp);
1317 struct qmp_ufs *qmp = phy_get_drvdata(phy);
1318 const struct qmp_phy_cfg *cfg = qmp->cfg;
1319 void __iomem *pcs = qmp->pcs;
1324 qmp_ufs_init_registers(qmp, cfg);
1326 ret = reset_control_deassert(qmp->ufs_reset);
1341 dev_err(qmp->dev, "phy initialization timed-out\n");
1350 struct qmp_ufs *qmp = phy_get_drvdata(phy);
1351 const struct qmp_phy_cfg *cfg = qmp->cfg;
1355 qphy_setbits(qmp->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
1358 qphy_clrbits(qmp->pcs, cfg->regs[QPHY_START_CTRL], SERDES_START);
1361 qphy_clrbits(qmp->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
1369 struct qmp_ufs *qmp = phy_get_drvdata(phy);
1371 qmp_ufs_com_exit(qmp);
1403 struct qmp_ufs *qmp = phy_get_drvdata(phy);
1405 qmp->mode = mode;
1406 qmp->submode = submode;
1418 static int qmp_ufs_vreg_init(struct qmp_ufs *qmp)
1420 const struct qmp_phy_cfg *cfg = qmp->cfg;
1421 struct device *dev = qmp->dev;
1425 qmp->vregs = devm_kcalloc(dev, num, sizeof(*qmp->vregs), GFP_KERNEL);
1426 if (!qmp->vregs)
1430 qmp->vregs[i].supply = cfg->vreg_list[i];
1432 return devm_regulator_bulk_get(dev, num, qmp->vregs);
1435 static int qmp_ufs_clk_init(struct qmp_ufs *qmp)
1437 const struct qmp_phy_cfg *cfg = qmp->cfg;
1438 struct device *dev = qmp->dev;
1442 qmp->clks = devm_kcalloc(dev, num, sizeof(*qmp->clks), GFP_KERNEL);
1443 if (!qmp->clks)
1447 qmp->clks[i].id = cfg->clk_list[i];
1449 return devm_clk_bulk_get(dev, num, qmp->clks);
1459 static int qmp_ufs_register_clocks(struct qmp_ufs *qmp, struct device_node *np)
1466 clk_data = devm_kzalloc(qmp->dev,
1474 snprintf(name, sizeof(name), "%s::rx_symbol_0", dev_name(qmp->dev));
1475 hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0);
1481 snprintf(name, sizeof(name), "%s::rx_symbol_1", dev_name(qmp->dev));
1482 hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0);
1488 snprintf(name, sizeof(name), "%s::tx_symbol_0", dev_name(qmp->dev));
1489 hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0);
1502 return devm_add_action_or_reset(qmp->dev, qmp_ufs_clk_release_provider, np);
1505 static int qmp_ufs_parse_dt_legacy(struct qmp_ufs *qmp, struct device_node *np)
1507 struct platform_device *pdev = to_platform_device(qmp->dev);
1508 const struct qmp_phy_cfg *cfg = qmp->cfg;
1509 struct device *dev = qmp->dev;
1511 qmp->serdes = devm_platform_ioremap_resource(pdev, 0);
1512 if (IS_ERR(qmp->serdes))
1513 return PTR_ERR(qmp->serdes);
1521 qmp->tx = devm_of_iomap(dev, np, 0, NULL);
1522 if (IS_ERR(qmp->tx))
1523 return PTR_ERR(qmp->tx);
1525 qmp->rx = devm_of_iomap(dev, np, 1, NULL);
1526 if (IS_ERR(qmp->rx))
1527 return PTR_ERR(qmp->rx);
1529 qmp->pcs = devm_of_iomap(dev, np, 2, NULL);
1530 if (IS_ERR(qmp->pcs))
1531 return PTR_ERR(qmp->pcs);
1534 qmp->tx2 = devm_of_iomap(dev, np, 3, NULL);
1535 if (IS_ERR(qmp->tx2))
1536 return PTR_ERR(qmp->tx2);
1538 qmp->rx2 = devm_of_iomap(dev, np, 4, NULL);
1539 if (IS_ERR(qmp->rx2))
1540 return PTR_ERR(qmp->rx2);
1542 qmp->pcs_misc = devm_of_iomap(dev, np, 5, NULL);
1544 qmp->pcs_misc = devm_of_iomap(dev, np, 3, NULL);
1547 if (IS_ERR(qmp->pcs_misc))
1553 static int qmp_ufs_parse_dt(struct qmp_ufs *qmp)
1555 struct platform_device *pdev = to_platform_device(qmp->dev);
1556 const struct qmp_phy_cfg *cfg = qmp->cfg;
1567 qmp->serdes = base + offs->serdes;
1568 qmp->pcs = base + offs->pcs;
1569 qmp->tx = base + offs->tx;
1570 qmp->rx = base + offs->rx;
1573 qmp->tx2 = base + offs->tx2;
1574 qmp->rx2 = base + offs->rx2;
1585 struct qmp_ufs *qmp;
1588 qmp = devm_kzalloc(dev, sizeof(*qmp), GFP_KERNEL);
1589 if (!qmp)
1592 qmp->dev = dev;
1594 qmp->cfg = of_device_get_match_data(dev);
1595 if (!qmp->cfg)
1598 ret = qmp_ufs_clk_init(qmp);
1602 ret = qmp_ufs_vreg_init(qmp);
1609 ret = qmp_ufs_parse_dt_legacy(qmp, np);
1612 ret = qmp_ufs_parse_dt(qmp);
1617 ret = qmp_ufs_register_clocks(qmp, np);
1621 qmp->phy = devm_phy_create(dev, np, &qcom_qmp_ufs_phy_ops);
1622 if (IS_ERR(qmp->phy)) {
1623 ret = PTR_ERR(qmp->phy);
1628 phy_set_drvdata(qmp->phy, qmp);
1643 .compatible = "qcom,msm8996-qmp-ufs-phy",
1646 .compatible = "qcom,msm8998-qmp-ufs-phy",
1649 .compatible = "qcom,sa8775p-qmp-ufs-phy",
1652 .compatible = "qcom,sc8180x-qmp-ufs-phy",
1655 .compatible = "qcom,sc8280xp-qmp-ufs-phy",
1658 .compatible = "qcom,sdm845-qmp-ufs-phy",
1661 .compatible = "qcom,sm6115-qmp-ufs-phy",
1664 .compatible = "qcom,sm6125-qmp-ufs-phy",
1667 .compatible = "qcom,sm6350-qmp-ufs-phy",
1670 .compatible = "qcom,sm7150-qmp-ufs-phy",
1673 .compatible = "qcom,sm8150-qmp-ufs-phy",
1676 .compatible = "qcom,sm8250-qmp-ufs-phy",
1679 .compatible = "qcom,sm8350-qmp-ufs-phy",
1682 .compatible = "qcom,sm8450-qmp-ufs-phy",
1685 .compatible = "qcom,sm8550-qmp-ufs-phy",
1695 .name = "qcom-qmp-ufs-phy",